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Message-ID: <aa8c628a-b0fc-a938-42a6-364f63031e1d@maxlinear.com>
Date:   Mon, 7 Jun 2021 13:28:25 +0000
From:   Liang Xu <lxu@...linear.com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "vee.khee.wong@...ux.intel.com" <vee.khee.wong@...ux.intel.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        Hauke Mehrtens <hmehrtens@...linear.com>,
        Thomas Mohren <tmohren@...linear.com>
Subject: Re: [PATCH v2] net: phy: add Maxlinear GPY115/21x/24x driver

On 7/6/2021 8:15 pm, Andrew Lunn wrote:
> This email was sent from outside of MaxLinear.
>
>
>> Yes, they all have same product number.
>>
>> They are one IP.
> O.K, this is the sort of information which is useful to have in the
> commit message. Basically anything which is odd about your PHY it is
> good to mention, because reviewers are probably going to notice and
> ask.
Thanks, will update.
>> The difference is feature set it's enabled by fusing in silicon.
>>
>> For example, GPY115 has 10/100/1000Mbps support, so in the ability
>> register 2.5G capable is 0.
>>
>> GPY211 has 10/100/1000/2500Mbps support, so in the capability register
>> 2.5G capable is 1.
> I assume it is more than just the capability register? Linux could
> easily ignore that and make use of 2.5G if it still actually works.
>
>         Andrew

You are right, not only capability register. The 2.5G function including 
relative

registers/bit-fields do not work.


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