netdev - Re: [PATCH v2 2/2] net: stmmac: Add Ingenic SoCs MAC support.

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Message-ID: <20210614235755.6c1bd34e@zhouyanjie-virtual-machine>
Date:   Mon, 14 Jun 2021 23:57:55 +0800
From:   周琰杰 <zhouyanjie@...yeetech.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     davem@...emloft.net, kuba@...nel.org, robh+dt@...nel.org,
        peppe.cavallaro@...com, alexandre.torgue@...s.st.com,
        joabreu@...opsys.com, mcoquelin.stm32@...il.com,
        linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org,
        netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, dongsheng.qiu@...enic.com,
        aric.pzqi@...enic.com, rick.tyliu@...enic.com,
        sihui.liu@...enic.com, jun.jiang@...enic.com,
        sernia.zhou@...mail.com, paul@...pouillou.net
Subject: Re: [PATCH v2 2/2] net: stmmac: Add Ingenic SoCs MAC support.

Hi Andrew,

于 Sun, 13 Jun 2021 18:31:36 +0200
Andrew Lunn <andrew@...n.ch> 写道:

> On Sun, Jun 13, 2021 at 04:34:52PM +0800, 周琰杰 wrote:
> > 于 Thu, 10 Jun 2021 16:57:29 +0200
> > Andrew Lunn <andrew@...n.ch> 写道:
> >   
> > > > Here is Ingenic's reply, the time length corresponding to a
> > > > unit is 19.5ps (19500fs).    
> > > 
> > > Sometimes, there is a negative offset in the delays. So a delay
> > > value of 0 written to the register actually means -200ps or
> > > something.  
> > 
> > Ah, perhaps this explains why we still need to add fine-tuning
> > parameter in rgmii-id and rgmii-txid modes to ensure that the
> > network works properly.  
> 
> Please try to find this out. rgmii means no delay. If the hardware is
> doing -500pS by default, you need to take this into account, and add
> the 500pS back on.

I think I may have found the problem. At present, my PHY uses a
general driver, and there is no specific setting for delay-related
registers. The default delay value of PHY is 1ns, which does not meet
the delay requirement of 2ns, after and the MAC side add 500ps delay
(and possibly some delays introduced on the hardware circuit), it just
meets the requirement of 2ns delay.

> 
>     Andrew