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Message-ID: <1623814766-91906-1-git-send-email-liudongdong3@huawei.com>
Date: Wed, 16 Jun 2021 11:39:20 +0800
From: Dongdong Liu <liudongdong3@...wei.com>
To: <helgaas@...nel.org>, <hch@...radead.org>, <kw@...ux.com>,
<linux-pci@...r.kernel.org>, <rajur@...lsio.com>,
<hverkuil-cisco@...all.nl>
CC: <linux-media@...r.kernel.org>, <netdev@...r.kernel.org>
Subject: [PATCH V4 0/6] PCI: Enable 10-Bit tag support for PCIe devices
10-Bit Tag capability, introduced in PCIe-4.0 increases the total Tag
field size from 8 bits to 10 bits.
This patchset is to enable 10-Bit tag for PCIe EP devices (include VF) and
RP devices
V3->V4:
- Get the value of pcie_devcap2 in set_pcie_port_type().
- Add Reviewed-by: Christoph Hellwig <hch@....de> in [PATCH V4 1/6],
[PATCH V4 3/6], [PATCH V4 4/6], [PATCH V4 5/6].
- Fix some code style.
- Rebased on v5.13-rc6.
V2->V3:
- Use cached Device Capabilities Register suggested by Christoph.
- Fix code style to avoid > 80 char lines.
- Renamve devcap2 to pcie_devcap2.
V1->V2: Fix some comments by Christoph.
- Store the devcap2 value in the pci_dev instead of reading it multiple
times.
- Change pci_info to pci_dbg to avoid the noisy log.
- Rename ext_10bit_tag_comp_path to ext_10bit_tag.
- Fix the compile error.
- Rebased on v5.13-rc1.
Dongdong Liu (6):
PCI: Use cached Device Capabilities Register
PCI: Use cached Device Capabilities 2 Register
PCI: Add 10-Bit Tag register definitions
PCI: Enable 10-Bit tag support for PCIe Endpoint devices
PCI/IOV: Enable 10-Bit tag support for PCIe VF devices
PCI: Enable 10-Bit tag support for PCIe RP devices
drivers/media/pci/cobalt/cobalt-driver.c | 5 +-
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 4 +-
drivers/pci/iov.c | 8 +++
drivers/pci/pci.c | 14 ++---
drivers/pci/pcie/aspm.c | 11 ++--
drivers/pci/pcie/portdrv_pci.c | 73 +++++++++++++++++++++++++
drivers/pci/probe.c | 54 +++++++++++++-----
drivers/pci/quirks.c | 3 +-
include/linux/pci.h | 5 ++
include/uapi/linux/pci_regs.h | 5 ++
10 files changed, 145 insertions(+), 37 deletions(-)
--
2.7.4
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