netdev - Re: Realtek 8139 problem on 486.

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Message-ID: <alpine.DEB.2.21.2106230244460.37803@angie.orcam.me.uk>
Date:   Wed, 23 Jun 2021 03:04:56 +0200 (CEST)
From:   "Maciej W. Rozycki" <macro@...am.me.uk>
To:     Arnd Bergmann <arnd@...nel.org>
cc:     Nikolai Zhubr <zhubr.2@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Heiner Kallweit <hkallweit1@...il.com>,
        netdev <netdev@...r.kernel.org>,
        the arch/x86 maintainers <x86@...nel.org>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>
Subject: Re: Realtek 8139 problem on 486.

On Tue, 22 Jun 2021, Arnd Bergmann wrote:

> > This fix looks really nice. Maybe it is right thing to do.
> 
> I'll leave that up to Thomas and Maciej to decide, they should have the
> best idea of why the x86 pci-irq code looks the way it does today and
> what the possible risk with my patch is.

 Ah, so this is the SiS 85C496/497 chipset; another one that does not have 
its southbridge visible in the PCI configuration space, perhaps because it 
doesn't put the southbridge on PCI in the first place, and instead it maps 
its configuration registers in the upper half of the northbridge's space.  
Oh, the joys of early attempts!

 It does PCI interrupt steering, it has the ELCR, but we don't have a PIRQ 
router implemented for it.  I have a datasheet, so this should be fairly 
trivial to do, and hopefully things will then work automagically, no need 
for hacks.

 It's very late tonight here, so let me come back with something tomorrow.

  Maciej