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Date:   Mon, 12 Jul 2021 16:06:26 +0300
From:   <alexandru.tachici@...log.com>
To:     <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>
CC:     <robh+dt@...nel.org>, <andrew@...n.ch>, <hkallweit1@...il.com>,
        <linux@...linux.org.uk>, <davem@...emloft.net>, <kuba@...nel.org>,
        "Alexandru Tachici" <alexandru.tachici@...log.com>
Subject: [PATCH v2 2/7] ethtool: Add 10base-T1L voltage levels link mode entries

From: Alexandru Tachici <alexandru.tachici@...log.com>

Add entries for the 10base-T1L possible link voltage levels.

Signed-off-by: Alexandru Tachici <alexandru.tachici@...log.com>
---
 drivers/net/phy/phy-core.c   | 2 +-
 include/uapi/linux/ethtool.h | 2 ++
 net/ethtool/common.c         | 4 ++++
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
index fd9c83ce10fc..a82e7457bda2 100644
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -13,7 +13,7 @@
  */
 const char *phy_speed_to_str(int speed)
 {
-	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 94,
+	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 96,
 		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
 		"If a speed or mode has been added please update phy_speed_to_str "
 		"and the PHY settings array.\n");
diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h
index 8a905466d7dc..748d7a01e4e9 100644
--- a/include/uapi/linux/ethtool.h
+++ b/include/uapi/linux/ethtool.h
@@ -1661,6 +1661,8 @@ enum ethtool_link_mode_bit_indices {
 	ETHTOOL_LINK_MODE_100baseFX_Full_BIT		 = 91,
 	ETHTOOL_LINK_MODE_10baseT1L_Half_BIT		 = 92,
 	ETHTOOL_LINK_MODE_10baseT1L_Full_BIT		 = 93,
+	ETHTOOL_LINK_MODE_2400mv_BIT			 = 94,
+	ETHTOOL_LINK_MODE_1000mv_BIT			 = 95,
 	/* must be last entry */
 	__ETHTOOL_LINK_MODE_MASK_NBITS
 };
diff --git a/net/ethtool/common.c b/net/ethtool/common.c
index 5b93d888fd83..c0110a4b3392 100644
--- a/net/ethtool/common.c
+++ b/net/ethtool/common.c
@@ -201,6 +201,8 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {
 	__DEFINE_LINK_MODE_NAME(100, FX, Full),
 	__DEFINE_LINK_MODE_NAME(10, T1L, Half),
 	__DEFINE_LINK_MODE_NAME(10, T1L, Full),
+	__DEFINE_SPECIAL_MODE_NAME(2400mv, "2400mv"),
+	__DEFINE_SPECIAL_MODE_NAME(1000mv, "1000mv"),
 };
 static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
 
@@ -349,6 +351,8 @@ const struct link_mode_info link_mode_params[] = {
 	__DEFINE_LINK_MODE_PARAMS(400000, CR4, Full),
 	__DEFINE_LINK_MODE_PARAMS(100, FX, Half),
 	__DEFINE_LINK_MODE_PARAMS(100, FX, Full),
+	__DEFINE_SPECIAL_MODE_PARAMS(2400mv),
+	__DEFINE_SPECIAL_MODE_PARAMS(1000mv),
 };
 static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS);
 
-- 
2.25.1

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