netdev - Re: [PATCH net-next 2/5] dt-bindings: net: Add tsnep Ethernet controller

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Message-ID: <b3921ff3-55d4-0d26-ebe3-2fee0c73332e@xilinx.com>
Date:   Wed, 28 Jul 2021 12:55:06 +0200
From:   Michal Simek <michal.simek@...inx.com>
To:     Gerhard Engleder <gerhard@...leder-embedded.com>,
        Michal Simek <michal.simek@...inx.com>
CC:     Rob Herring <robh+dt@...nel.org>,
        David Miller <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        netdev <netdev@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH net-next 2/5] dt-bindings: net: Add tsnep Ethernet
 controller



On 7/28/21 9:44 AM, Gerhard Engleder wrote:
> On Wed, Jul 28, 2021 at 7:13 AM Michal Simek <michal.simek@...inx.com> wrote:
>> On 7/27/21 10:25 PM, Rob Herring wrote:
>>> On Tue, Jul 27, 2021 at 12:35 PM Gerhard Engleder
>>> <gerhard@...leder-embedded.com> wrote:
>>>>
>>>> On Tue, Jul 27, 2021 at 1:35 AM Rob Herring <robh+dt@...nel.org> wrote:
>>>>>> +properties:
>>>>>> +  compatible:
>>>>>> +    oneOf:
>>>>>
>>>>> Don't need oneOf when there is only one entry.
>>>>
>>>> I will fix that.
>>>>
>>>>>> +      - enum:
>>>>>> +        - engleder,tsnep
>>>>>
>>>>> tsnep is pretty generic. Only 1 version ever? Or differences are/will
>>>>> be discoverable by other means.
>>>>
>>>> Differences shall be detected by flags in the registers; e.g., a flag for
>>>> gate control support. Anyway a version may make sense. Can you
>>>> point to a good reference binding with versions? I did not find a
>>>> network controller binding with versions.
>>>
>>> Some of the SiFive IP blocks have versions. Version numbers are the
>>> exception though. Ideally they would correspond to some version of
>>> your FPGA image. I just don't want to see 'v1' because that sounds
>>> made up. The above string can mean 'v1' or whatever version you want.
>>> I'm fine if you just add some description here about feature flag
>>> registers.
>>
>> Don't Xilinx design tool (vivado) force you to use IP version?
>> Normally all Xilinx IPs have certain version because that's the only way
>> how to manage it.
> 
> Yes I use an IP version in the Xilinx design tool. I use it as a version of the
> VHDL code itself. In my case this version is not related to the
> hardware software
> interface. The goal is to keep the hardware software interface compatible, so
> the IP version should not be relevant.

I expect this is goal for everybody but it fails over time. We normally
compose compatible string for PL based IP with IP version which is used.
And it is quite common that couple of HW version are SW compatible to
each other.
It means use the same HW version as you use now. When you reach the
point when your HW IP needs to be upgraded and will require SW alignment
you have versions around which can be used directly.

Thanks,
Michal