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Message-ID: <1627645754-18131-1-git-send-email-sgoutham@marvell.com>
Date:   Fri, 30 Jul 2021 17:19:12 +0530
From:   Sunil Goutham <sgoutham@...vell.com>
To:     <netdev@...r.kernel.org>, <davem@...emloft.net>, <kuba@...nel.org>
CC:     Sunil Goutham <sgoutham@...vell.com>
Subject: [net-next PATCH 0/2] cn10k: DWRR MTU and weights configuration

On OcteonTx2 DWRR quantum is directly configured into each of
the transmit scheduler queues. And PF/VF drivers were free to
config any value upto 2^24.

On CN10K, HW is modified, the quantum configuration at scheduler
queues is in terms of weight. And SW needs to setup a base DWRR MTU
at NIX_AF_DWRR_RPM_MTU / NIX_AF_DWRR_SDP_MTU. HW will do
'DWRR MTU * weight' to get the quantum.

This patch series addresses this HW change on CN10K silicons,
both admin function and PF/VF drivers are modified.

Also added support to program DWRR MTU via devlink params.

Sunil Goutham (2):
  octeontx2-af: cn10k: DWRR MTU configuration
  octeontx2-pf: cn10k: Config DWRR weight based on MTU

 drivers/net/ethernet/marvell/octeontx2/af/common.h |   5 +-
 drivers/net/ethernet/marvell/octeontx2/af/mbox.h   |   4 +
 drivers/net/ethernet/marvell/octeontx2/af/rvu.h    |   3 +
 .../ethernet/marvell/octeontx2/af/rvu_devlink.c    | 110 ++++++++++++++++++++-
 .../net/ethernet/marvell/octeontx2/af/rvu_nix.c    | 103 ++++++++++++++++++-
 .../net/ethernet/marvell/octeontx2/af/rvu_reg.h    |   2 +
 drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c |   3 +-
 drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h |  14 +++
 .../ethernet/marvell/octeontx2/nic/otx2_common.c   |  23 +++--
 .../ethernet/marvell/octeontx2/nic/otx2_common.h   |   1 +
 10 files changed, 253 insertions(+), 15 deletions(-)

-- 
2.7.4

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