netdev - Re: [PATCH net 1/1] net: dsa: qca: ar9331: reorder MDIO write sequence

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Date:   Tue, 03 Aug 2021 21:40:05 +0000
From:   patchwork-bot+netdevbpf@...nel.org
To:     Oleksij Rempel <o.rempel@...gutronix.de>
Cc:     andrew@...n.ch, vivien.didelot@...il.com, f.fainelli@...il.com,
        olteanv@...il.com, davem@...emloft.net, kuba@...nel.org,
        linux@...linux.org.uk, kernel@...gutronix.de,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mips@...r.kernel.org
Subject: Re: [PATCH net 1/1] net: dsa: qca: ar9331: reorder MDIO write sequence

Hello:

This patch was applied to netdev/net.git (refs/heads/master):

On Tue,  3 Aug 2021 08:37:46 +0200 you wrote:
> In case of this switch we work with 32bit registers on top of 16bit
> bus. Some registers (for example access to forwarding database) have
> trigger bit on the first 16bit half of request and the result +
> configuration of request in the second half. Without this patch, we would
> trigger database operation and overwrite result in one run.
> 
> To make it work properly, we should do the second part of transfer
> before the first one is done.
> 
> [...]

Here is the summary with links:
  - [net,1/1] net: dsa: qca: ar9331: reorder MDIO write sequence
    https://git.kernel.org/netdev/net/c/d1a58c013a58

You are awesome, thank you!
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