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Date:   Tue,  3 Aug 2021 16:19:45 -0700
From:   Saeed Mahameed <>
To:     Saeed Mahameed <>,
        Leon Romanovsky <>
Subject: [PATCH mlx5-next 00/14] mlx5 single FDB for lag

From: Saeed Mahameed <>

This series is aimed at mlx5-next branch to be pulled later by both
rdma and netdev subsystems as it contains patches to both trees.

The series provides support for single shared FDB table for lag:

Shared FDB allows to direct traffic from all the vports in the HCA to a
single E-Switch, as opposed to an E-Switch per up-link, a single E-switch
will improve the lag logic as the traffic will be handled by a single point
on the device, which allows more flexibility and natural management of FDB
rules when lag is ON.

Before shared FDB in order to control traffic from a vport when lag was
ON a FDB rule had to be duplicated (on both E-switches), with single FDB
duplication is not required.

To achieve single FDB:

1) Point the ingress ACL of the slave uplink to that of the master.
   With this, wire traffic from both uplinks will reach the same eswitch
   with the same metadata where a single steering rule can catch traffic
   from both ports.
2) Set the FDB root flow table of the slave's eswitch to that of the
   master. As this flow table can change dynamically make sure to
   sync it on any set root flow table FDB command.
   This will make sure traffic from SFs, VFs, ECPFs and PFs reach the
   master eswitch.
3) Split wire traffic at the eswitch manager egress ACL so that it's
   directed to the native eswitch manager. We only treat wire traffic
   from both ports the same at the eswitch level. If such traffic wasn't
   handled in the eswitch it needs to reach the right representor to be
   processed by software. For example LACP packets should *always*
   reach the right uplink representor for correct operation.


Ariel Levkovich (1):
  net/mlx5: E-Switch, set flow source for send to uplink rule

Mark Bloch (11):
  net/mlx5: Return mdev from eswitch
  net/mlx5: Lag, add initial logic for shared FDB
  RDMA/mlx5: Fill port info based on the relevant eswitch
  {net, RDMA}/mlx5: Extend send to vport rules
  RDMA/mlx5: Add shared FDB support
  net/mlx5: E-Switch, Add event callback for representors
  net/mlx5: Add send to vport rules on paired device
  net/mlx5: Lag, properly lock eswitch if needed
  net/mlx5: Lag, move lag destruction to a workqueue
  net/mlx5/ E-Switch, add logic to enable shared FDB
  net/mlx5: Lag, Create shared FDB when in switchdev mode

Roi Dayan (2):
  net/mlx5e: Add an option to create a shared mapping
  net/mlx5e: Use shared mappings for restoring from metadata

 drivers/infiniband/hw/mlx5/ib_rep.c           |  77 +++-
 drivers/infiniband/hw/mlx5/main.c             |  44 +-
 drivers/infiniband/hw/mlx5/std_types.c        |  10 +-
 .../ethernet/mellanox/mlx5/core/en/mapping.c  |  45 ++
 .../ethernet/mellanox/mlx5/core/en/mapping.h  |   5 +
 .../ethernet/mellanox/mlx5/core/en/tc_ct.c    |   9 +-
 .../net/ethernet/mellanox/mlx5/core/en_rep.c  |  88 +++-
 .../net/ethernet/mellanox/mlx5/core/en_rep.h  |   2 +
 .../net/ethernet/mellanox/mlx5/core/en_tc.c   |  21 +-
 .../mellanox/mlx5/core/esw/acl/egress_ofld.c  |  16 +
 .../net/ethernet/mellanox/mlx5/core/eswitch.c |  36 +-
 .../net/ethernet/mellanox/mlx5/core/eswitch.h |  38 ++
 .../mellanox/mlx5/core/eswitch_offloads.c     | 383 +++++++++++++++++-
 .../net/ethernet/mellanox/mlx5/core/fs_cmd.c  |  58 ++-
 .../net/ethernet/mellanox/mlx5/core/fs_core.c |   2 +-
 .../net/ethernet/mellanox/mlx5/core/fs_core.h |   2 +
 drivers/net/ethernet/mellanox/mlx5/core/lag.c | 267 ++++++++++--
 drivers/net/ethernet/mellanox/mlx5/core/lag.h |   5 +-
 .../net/ethernet/mellanox/mlx5/core/lag_mp.c  |   2 +-
 .../net/ethernet/mellanox/mlx5/core/main.c    |   5 +-
 .../ethernet/mellanox/mlx5/core/mlx5_core.h   |   2 +
 include/linux/mlx5/driver.h                   |   3 +
 include/linux/mlx5/eswitch.h                  |  16 +
 23 files changed, 1043 insertions(+), 93 deletions(-)


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