netdev - Re: Marvell switch port shows LOWERLAYERDOWN, ping fails

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Message-ID: <404e5b00-59ee-1165-4f7c-d0853c730354@helixd.com>
Date:   Tue, 10 Aug 2021 13:58:21 -0700
From:   Dario Alcocer <dalcocer@...ixd.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     netdev@...r.kernel.org
Subject: Re: Marvell switch port shows LOWERLAYERDOWN, ping fails

Well, I misread the schematic; the DSA ports are connected via four pins 
on each of the MV88E6176 chips (S_RXP, S_RXN, S_TXP, S_TXN):

S_RXP (PHY 0x1E) <---> S_TXP (PHY 0x1A)
S_RXN (PHY 0x1E) <---> S_TXN (PHY 0x1A)
S_TXP (PHY 0x1E) <---> S_RXP (PHY 0x1A)
S_TXN (PHY 0x1E) <---> S_RXN (PHY 0x1A)

As you mentioned before, 1G requires 4 pairs. Thus, it seems that 
phy-mode = "1000base-x" and speed = <1000> cannot be used for the SERDES 
link.

So far, I've tried phy-mode = "mii" with speed = <100>, with no success.

Are there more appropriate values I should use to configure the SERDES 
phy-mode and speed device-tree resources?