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Message-ID: <20210818112428.209111-2-markzhang@nvidia.com>
Date: Wed, 18 Aug 2021 14:24:19 +0300
From: Mark Zhang <markzhang@...dia.com>
To: <jgg@...dia.com>, <dledford@...hat.com>, <saeedm@...dia.com>
CC: <linux-rdma@...r.kernel.org>, <netdev@...r.kernel.org>,
<aharonl@...dia.com>, <netao@...dia.com>, <leonro@...dia.com>,
Mark Zhang <markzhang@...dia.com>
Subject: [PATCH rdma-next 01/10] net/mlx5: Add support in bth_opcode as a match criteria
From: Aharon Landau <aharonl@...dia.com>
Adding bth_opcode field and the relevant bits.
This field will be used to capture and count cnp packets.
Signed-off-by: Aharon Landau <aharonl@...dia.com>
Reviewed-by: Maor Gottlieb <maorg@...dia.com>
Signed-off-by: Mark Zhang <markzhang@...dia.com>
---
include/linux/mlx5/mlx5_ifc.h | 20 ++++++++++++++++++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 3dd6641e942c..2828d596af49 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -393,6 +393,14 @@ struct mlx5_ifc_flow_table_fields_supported_bits {
u8 metadata_reg_c_0[0x1];
};
+struct mlx5_ifc_flow_table_fields_supported_2_bits {
+ u8 reserved_at_0[0xe];
+ u8 bth_opcode[0x1];
+ u8 reserved_at_f[0x11];
+
+ u8 reserved_at_20[0x60];
+};
+
struct mlx5_ifc_flow_table_prop_layout_bits {
u8 ft_support[0x1];
u8 reserved_at_1[0x1];
@@ -539,7 +547,7 @@ struct mlx5_ifc_fte_match_set_misc_bits {
union mlx5_ifc_gre_key_bits gre_key;
u8 vxlan_vni[0x18];
- u8 reserved_at_b8[0x8];
+ u8 bth_opcode[0x8];
u8 geneve_vni[0x18];
u8 reserved_at_d8[0x7];
@@ -756,7 +764,15 @@ struct mlx5_ifc_flow_table_nic_cap_bits {
struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
- u8 reserved_at_e00[0x1200];
+ u8 reserved_at_e00[0x700];
+
+ struct mlx5_ifc_flow_table_fields_supported_2_bits ft_field_support_2_nic_receive_rdma;
+
+ u8 reserved_at_1580[0x280];
+
+ struct mlx5_ifc_flow_table_fields_supported_2_bits ft_field_support_2_nic_transmit_rdma;
+
+ u8 reserved_at_1880[0x780];
u8 sw_steering_nic_rx_action_drop_icm_address[0x40];
--
2.26.2
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