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Message-Id: <20210824055509.1316124-1-dqfext@gmail.com>
Date: Tue, 24 Aug 2021 13:55:08 +0800
From: DENG Qingfang <dqfext@...il.com>
To: stable@...r.kernel.org
Cc: Sean Wang <sean.wang@...iatek.com>, Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
Florian Fainelli <f.fainelli@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Matthias Brugger <matthias.bgg@...il.com>,
netdev@...r.kernel.org (open list:MEDIATEK SWITCH DRIVER),
linux-kernel@...r.kernel.org (open list),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM/Mediatek SoC
support),
linux-mediatek@...ts.infradead.org (moderated list:ARM/Mediatek SoC
support)
Subject: [PATCH 4.19.y] net: dsa: mt7530: disable learning on standalone ports
This is a partial backport of commit 5a30833b9a16f8d1aa15de06636f9317ca51f9df
("net: dsa: mt7530: support MDB and bridge flag operations") upstream.
Make sure that the standalone ports start up with learning disabled.
Signed-off-by: DENG Qingfang <dqfext@...il.com>
---
drivers/net/dsa/mt7530.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 6335c4ea0957..67dfab774618 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -803,6 +803,8 @@ mt7530_port_bridge_join(struct dsa_switch *ds, int port,
PCR_MATRIX_MASK, PCR_MATRIX(port_bitmap));
priv->ports[port].pm |= PCR_MATRIX(port_bitmap);
+ mt7530_clear(priv, MT7530_PSC_P(port), SA_DIS);
+
mutex_unlock(&priv->reg_mutex);
return 0;
@@ -907,6 +909,8 @@ mt7530_port_bridge_leave(struct dsa_switch *ds, int port,
mt7530_port_set_vlan_unaware(ds, port);
+ mt7530_set(priv, MT7530_PSC_P(port), SA_DIS);
+
mutex_unlock(&priv->reg_mutex);
}
@@ -1287,11 +1291,15 @@ mt7530_setup(struct dsa_switch *ds)
mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
PCR_MATRIX_CLR);
- if (dsa_is_cpu_port(ds, i))
+ if (dsa_is_cpu_port(ds, i)) {
mt7530_cpu_port_enable(priv, i);
- else
+ } else {
mt7530_port_disable(ds, i, NULL);
+ /* Disable learning by default on all user ports */
+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
+ }
+
/* Enable consistent egress tag */
mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
--
2.25.1
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