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Message-ID: <OS0PR01MB5922C9765F849F1A3F8055B986C99@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date: Sat, 28 Aug 2021 09:28:50 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Sergey Shtylyov <s.shtylyov@....ru>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>
CC: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
Andrew Lunn <andrew@...n.ch>,
Sergei Shtylyov <sergei.shtylyov@...il.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Adam Ford <aford173@...il.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>
Subject: RE: [PATCH net-next 11/13] ravb: Factorise ravb_dmac_init function
Hi Sergei,
Thanks for the feedback.
> Subject: Re: [PATCH net-next 11/13] ravb: Factorise ravb_dmac_init
> function
>
> On 8/25/21 10:01 AM, Biju Das wrote:
>
> > The DMAC IP on the R-Car AVB module has different initialization
> > parameters for RCR, TGC, TCCR, RIC0, RIC2, and TIC compared to DMAC IP
> > on the RZ/G2L Gigabit Ethernet module. Factorise the ravb_dmac_init
> > function to support the later SoC.
>
> Couldn't we resolve these differencies like the sh_eth driver does, by
> adding the register values into the *struct* ravb_hw_info?
I will evaluate your proposal in terms of code size and data size
And with the current code and share the details in next RFC patchset
for supporting RZ/G2L with dmac_init function.
Based on the RFC discussion, we can conclude it.
Currently by looking at your proposal, I am seeing duplication of
Data in R-Car Gen3 and R-Car Gen2.
If statement for adding RIC3 register for RZ/G2L, which involves
Exposing another hwinfo bit.
Regards,
Biju
>
> >
> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> [...]
>
> MBR, Sergey
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