netdev - Re: [PATCH] net: renesas: sh_eth: Fix freeing wrong tx descriptor

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Message-ID: <9f3a0195-8218-e73c-eb63-bbd7b6ff9777@omp.ru>
Date:   Wed, 8 Sep 2021 12:46:17 +0300
From:   Sergey Shtylyov <s.shtylyov@....ru>
To:     Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>
Subject: Re: [PATCH] net: renesas: sh_eth: Fix freeing wrong tx descriptor

On 08.09.2021 8:45, Yoshihiro Shimoda wrote:

>>> The cur_tx counter must be incremented after TACT bit of
>>> txdesc->status was set. However, a CPU is possible to reorder
>>> instructions and/or memory accesses between cur_tx and
>>> txdesc->status. And then, if TX interrupt happened at such a
>>> timing, the sh_eth_tx_free() may free the descriptor wrongly.
>>> So, add wmb() before cur_tx++.
>>
>>     Not dma_wmb()? :-)
> 
> On armv8, dma_wmb() is DMB OSHST, and wmb() is DSB ST.
> IIUC, DMB OSHST is not affected the ordering of instructions.
> So, we have to use wmb().

    I should really read up the ARM manuals on the barrier instructions... :-)

>>> Otherwise NETDEV WATCHDOG timeout is possible to happen.
>>>
>>> Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet")
>>> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
>>
>> Reviewed-by: Sergey Shtylyov <s.shtylyov@....ru>
> 
> Thank you for your review!

    Out of curiosity: have you really experienced the bug or found it by
review?

> Best regards,
> Yoshihiro Shimoda

MBR, Sergey