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Date:   Thu, 16 Sep 2021 16:51:51 +0530
From:   Aswath Govindraju <a-govindraju@...com>
To:     unlisted-recipients:; (no To-header on input)
CC:     Lokesh Vutla <lokeshvutla@...com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Aswath Govindraju <a-govindraju@...com>,
        Chandrasekar Ramakrishnan <rcsekar@...sung.com>,
        Wolfgang Grandegger <wg@...ndegger.com>,
        Marc Kleine-Budde <mkl@...gutronix.de>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Matt Kline <matt@...bashing.io>, <linux-can@...r.kernel.org>,
        <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH] can: m_can: m_can_platform: Fix the base address in iomap_write_fifo()

The write into fifo must be performed with an offset from the message ram
base address. Therefore, fix the base address to mram_base.

Fixes: e39381770ec9 ("can: m_can: Disable IRQs on FIFO bus errors")
Signed-off-by: Aswath Govindraju <a-govindraju@...com>
---
 drivers/net/can/m_can/m_can_platform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c
index 308d4f2fff00..08eac03ebf2a 100644
--- a/drivers/net/can/m_can/m_can_platform.c
+++ b/drivers/net/can/m_can/m_can_platform.c
@@ -52,7 +52,7 @@ static int iomap_write_fifo(struct m_can_classdev *cdev, int offset,
 {
 	struct m_can_plat_priv *priv = cdev_to_priv(cdev);
 
-	iowrite32_rep(priv->base + offset, val, val_count);
+	iowrite32_rep(priv->mram_base + offset, val, val_count);
 
 	return 0;
 }
-- 
2.17.1

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