netdev - Re: [PATCH net-next 1/2] rtnetlink: Add new RTM_GETEECSTATE message to get SyncE status

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Date:   Tue, 21 Sep 2021 14:14:45 -0700
From:   Jakub Kicinski <kuba@...nel.org>
To:     Ido Schimmel <idosch@...sch.org>
Cc:     "Machnikowski, Maciej" <maciej.machnikowski@...el.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>,
        "richardcochran@...il.com" <richardcochran@...il.com>,
        "abyagowi@...com" <abyagowi@...com>,
        "Nguyen, Anthony L" <anthony.l.nguyen@...el.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "linux-kselftest@...r.kernel.org" <linux-kselftest@...r.kernel.org>
Subject: Re: [PATCH net-next 1/2] rtnetlink: Add new RTM_GETEECSTATE message
 to get SyncE status

On Tue, 21 Sep 2021 17:58:05 +0300 Ido Schimmel wrote:
> > > The only source type above is 'port' with the ability to set the
> > > relevant port, but more can be added. Obviously, 'devlink clock show'
> > > will give you the current source in addition to other information such
> > > as frequency difference with respect to the input frequency.  
> > 
> > We considered devlink interface for configuring the clock/DPLL, but a
> > new concept was born at the list to add a DPLL subsystem that will
> > cover more use cases, like a TimeCard.  
> 
> The reason I suggested devlink is that it is suited for device-wide
> configuration and it is already used by both MAC drivers and the
> TimeCard driver. If we have a good reason to create a new generic
> netlink family for this stuff, then OK.

For NICs mapping between devlink instances and HW is not clear.
Most register devlink per PCI dev which usually maps to a Eth port.
So if we have one DPLL on a 2 port NIC mapping will get icky, no?

Is the motivation to save the boilerplate code associated with new
genetlink family or something more?