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Message-ID: <OS0PR01MB5922E6E21AD933CFFDDD871C86A69@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date: Sun, 26 Sep 2021 13:38:09 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Sergey Shtylyov <s.shtylyov@....ru>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>
CC: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
Andrew Lunn <andrew@...n.ch>,
Sergei Shtylyov <sergei.shtylyov@...il.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Adam Ford <aford173@...il.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>
Subject: RE: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
Hi Sergei,
> Subject: RE: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
>
> Hi Sergey,
>
> > Subject: RE: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
> >
> > HI Sergei,
> >
> > > Subject: Re: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
> > >
> > > On 9/23/21 5:07 PM, Biju Das wrote:
> > >
> > > > Initialize GbEthernet dmac found on RZ/G2L SoC.
> > > > This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar
> > > > to be consistent with the naming convention used in sh_eth driver.
> > > >
> > > > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > > > ---
> > > > drivers/net/ethernet/renesas/ravb.h | 4 ++
> > > > drivers/net/ethernet/renesas/ravb_main.c | 84
> > > > +++++++++++++++++++++++-
> > > > 2 files changed, 85 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/drivers/net/ethernet/renesas/ravb.h
> > > > b/drivers/net/ethernet/renesas/ravb.h
> > > > index 0ce0c13ef8cb..bee05e6fb815 100644
> > > > --- a/drivers/net/ethernet/renesas/ravb.h
> > > > +++ b/drivers/net/ethernet/renesas/ravb.h
> > > > @@ -81,6 +81,7 @@ enum ravb_reg {
> > > > RQC3 = 0x00A0,
> > > > RQC4 = 0x00A4,
> > > > RPC = 0x00B0,
> > > > + RTC = 0x00B4, /* RZ/G2L only */
> > >
> > > My gen3 manual says the regiuster exists there...
>
> The existing driver is not using it. Since manual says there is RTC, I
> will document for Gen3 as well.
>
> > >
> > > > UFCW = 0x00BC,
> > > > UFCS = 0x00C0,
> > > > UFCV0 = 0x00C4,
> > > > @@ -156,6 +157,7 @@ enum ravb_reg {
> > > > TIS = 0x037C,
> > > > ISS = 0x0380,
> > > > CIE = 0x0384, /* R-Car Gen3 only */
> > > > + RIC3 = 0x0388, /* RZ/G2L only */
> > >
> > > Again, this register (along with RIS3) exists on gen3...
>
> RIS3 is not used by R-Car or RZ/G2L hence it not documented.
> But RIC3 is used by RZ/G2L. As per gen3 hw manual it is present, so I will
> update the comment.
I am dropping RIC3 for RZ/G2L as default value is 0 and code is initializing with 0
Which is not needed.
>
> > >
> > > > GCCR = 0x0390,
> > > > GMTT = 0x0394,
> > > > GPTC = 0x0398,
> > > > @@ -956,6 +958,8 @@ enum RAVB_QUEUE {
> > > >
> > > > #define RX_BUF_SZ (2048 - ETH_FCS_LEN + sizeof(__sum16))
> > > >
> > > > +#define RGETH_RX_BUFF_MAX 8192
> > > > +
> > > > struct ravb_tstamp_skb {
> > > > struct list_head list;
> > > > struct sk_buff *skb;
> > > > diff --git a/drivers/net/ethernet/renesas/ravb_main.c
> > > > b/drivers/net/ethernet/renesas/ravb_main.c
> > > > index 2422e74d9b4f..54c4d31a6950 100644
> > > > --- a/drivers/net/ethernet/renesas/ravb_main.c
> > > > +++ b/drivers/net/ethernet/renesas/ravb_main.c
> > > > @@ -83,6 +83,11 @@ static int ravb_config(struct net_device *ndev)
> > > > return error;
> > > > }
> > > >
> > > > +static void ravb_rgeth_set_rate(struct net_device *ndev) {
> > > > + /* Place holder */
> > > > +}
> > > > +
> > > > static void ravb_set_rate(struct net_device *ndev) {
> > > > struct ravb_private *priv = netdev_priv(ndev); @@ -217,6
> +222,11
> > > > @@ static int ravb_tx_free(struct net_device *ndev, int q, bool
> > > free_txed_only)
> > > > return free_num;
> > > > }
> > > >
> > > > +static void ravb_rx_ring_free_rgeth(struct net_device *ndev, int q)
> {
> > > > + /* Place holder */
> > > > +}
> > > > +
> > > > static void ravb_rx_ring_free(struct net_device *ndev, int q) {
> > > > struct ravb_private *priv = netdev_priv(ndev); @@ -283,6
> +293,11
> > > > @@ static void ravb_ring_free(struct net_device *ndev, int q)
> > > > priv->tx_skb[q] = NULL;
> > > > }
> > > >
> > > > +static void ravb_rx_ring_format_rgeth(struct net_device *ndev,
> > > > +int
> > > > +q) {
> > > > + /* Place holder */
> > > > +}
> > > > +
> > > > static void ravb_rx_ring_format(struct net_device *ndev, int q) {
> > > > struct ravb_private *priv = netdev_priv(ndev); @@ -356,6
> +371,12
> > > > @@ static void ravb_ring_format(struct net_device *ndev, int q)
> > > > desc->dptr = cpu_to_le32((u32)priv->tx_desc_dma[q]);
> > > > }
> > > >
> > > > +static void *ravb_rgeth_alloc_rx_desc(struct net_device *ndev,
> > > > +int
> > > > +q) {
> > > > + /* Place holder */
> > > > + return NULL;
> > > > +}
> > > > +
> > > > static void *ravb_alloc_rx_desc(struct net_device *ndev, int q) {
> > > > struct ravb_private *priv = netdev_priv(ndev); @@ -426,6
> +447,11
> > > > @@ static int ravb_ring_init(struct net_device *ndev, int q)
> > > > return -ENOMEM;
> > > > }
> > > >
> > > > +static void ravb_rgeth_emac_init(struct net_device *ndev) {
> > > > + /* Place holder */
> > > > +}
> > > > +
> > > > static void ravb_rcar_emac_init(struct net_device *ndev) {
> > > > /* Receive frame limit set register */ @@ -461,7 +487,32 @@
> > > > static void ravb_emac_init(struct net_device *ndev)
> > > > info->emac_init(ndev);
> > > > }
> > > >
> > > > -static void ravb_rcar_dmac_init(struct net_device *ndev)
> > > > +static void ravb_dmac_init_rgeth(struct net_device *ndev) {
> > > > + /* Set AVB RX */
> > > > + ravb_write(ndev, 0x60000000, RCR);
> > > > +
> > > > + /* Set Max Frame Length (RTC) */
> > > > + ravb_write(ndev, 0x7ffc0000 | RGETH_RX_BUFF_MAX, RTC);
> > >
> > > Should be init'ed on gen3 as well?
> >
> > Rcar gen3 has separate initialization routine, This part is RZ/G2L
> > specific, the buffer size is different.
> >
> > >
> > > > +
> > > > + /* Set FIFO size */
> > > > + ravb_write(ndev, 0x00222200, TGC);
> > > > +
> > > > + ravb_write(ndev, 0, TCCR);
> > > > +
> > > > + /* Frame receive */
> > > > + ravb_write(ndev, RIC0_FRE0, RIC0);
> > > > + /* Disable FIFO full warning */
> > > > + ravb_write(ndev, 0x0, RIC1);
> > > > + /* Receive FIFO full error, descriptor empty */
> > > > + ravb_write(ndev, RIC2_QFE0 | RIC2_RFFE, RIC2);
> > > > +
> > > > + ravb_write(ndev, 0x0, RIC3);
> > >
> > > Should be init'ed on gen3 as well? Matter of a separate patch, I
> > > can do it prolly...
> >
> > OK. May be after completing RZ/G2L, I can investigate on gen3 stuff or
> > If you have R-Car board and confirm this change Won't break anything
> > on R-Car gen3, you can submit the patch.
As mentioned above I am dropping this initialization for RIC3, as per H/W manual
Reset value of RIC3 is 0.
Regards,
Biju
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