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Message-ID: <OS0PR01MB5922F0CD1758CD3E9EF080E586A69@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date:   Sun, 26 Sep 2021 15:49:57 +0000
From:   Biju Das <biju.das.jz@...renesas.com>
To:     Biju Das <biju.das.jz@...renesas.com>,
        Sergey Shtylyov <s.shtylyov@....ru>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>
CC:     Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
        Andrew Lunn <andrew@...n.ch>,
        Sergei Shtylyov <sergei.shtylyov@...il.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Adam Ford <aford173@...il.com>,
        Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>
Subject: RE: [RFC/PATCH 08/18] ravb: Add mii_rgmii_selection to struct
 ravb_hw_info

Hi Sergei,

> Subject: RE: [RFC/PATCH 08/18] ravb: Add mii_rgmii_selection to struct
> ravb_hw_info
> 
> Hi Sergei,
> 
> Thanks for the feedback.
> 
> > Subject: Re: [RFC/PATCH 08/18] ravb: Add mii_rgmii_selection to struct
> > ravb_hw_info
> >
> > On 9/23/21 5:08 PM, Biju Das wrote:
> >
> > > E-MAC on RZ/G2L supports MII/RGMII selection. Add a
> > > mii_rgmii_selection feature bit to struct ravb_hw_info to support
> > > this for RZ/G2L.
> > > Currently only selecting RGMII is supported.
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > > ---
> > >  drivers/net/ethernet/renesas/ravb.h      | 17 +++++++++++++++++
> > >  drivers/net/ethernet/renesas/ravb_main.c |  6 ++++++
> > >  2 files changed, 23 insertions(+)
> > >
> > > diff --git a/drivers/net/ethernet/renesas/ravb.h
> > > b/drivers/net/ethernet/renesas/ravb.h
> > > index bce480fadb91..dfaf3121da44 100644
> > > --- a/drivers/net/ethernet/renesas/ravb.h
> > > +++ b/drivers/net/ethernet/renesas/ravb.h
> > [...]
> > > @@ -951,6 +953,20 @@ enum RAVB_QUEUE {
> > >  	RAVB_NC,	/* Network Control Queue */
> > >  };
> > >
> > > +enum CXR31_BIT {
> > > +	CXR31_SEL_LINK0	= 0x00000001,
> > > +	CXR31_SEL_LINK1	= 0x00000008,
> > > +};
> > > +
> > > +enum CXR35_BIT {
> > > +	CXR35_SEL_MODIN	= 0x00000100,
> > > +};
> > > +
> > > +enum CSR0_BIT {
> > > +	CSR0_TPE	= 0x00000010,
> > > +	CSR0_RPE	= 0x00000020,
> > > +};
> >
> >    I don't see those used? What is CSR0?
> 
> OK, This has to be part of later patch for emac_init. CSR is checksum
> operating mode register in TOE.
> 
> >
> > [...]
> > > @@ -1008,6 +1024,7 @@ struct ravb_hw_info {
> > >  	unsigned ccc_gac:1;		/* AVB-DMAC has gPTP support active in
> > config mode */
> > >  	unsigned multi_tsrq:1;		/* AVB-DMAC has MULTI TSRQ */
> > >  	unsigned magic_pkt:1;		/* E-MAC supports magic packet
> > detection */
> > > +	unsigned mii_rgmii_selection:1;	/* E-MAC supports mii/rgmii
> > selection */
> >
> >    Perhaps just 'mii_rgmii_sel'?
> OK.
> 
> >
> > [...]
> > > diff --git a/drivers/net/ethernet/renesas/ravb_main.c
> > > b/drivers/net/ethernet/renesas/ravb_main.c
> > > index 529364d8f7fb..5d18681582b9 100644
> > > --- a/drivers/net/ethernet/renesas/ravb_main.c
> > > +++ b/drivers/net/ethernet/renesas/ravb_main.c
> > [...]
> > > @@ -1173,6 +1174,10 @@ static int ravb_phy_init(struct net_device
> *ndev)
> > >  		netdev_info(ndev, "limited PHY to 100Mbit/s\n");
> > >  	}
> > >
> > > +	if (info->mii_rgmii_selection &&
> > > +	    priv->phy_interface == PHY_INTERFACE_MODE_RGMII_ID)
> >
> >    Not MII?
> 
> Currently only RGMII supported, see the commit message.
> >
> > > +		ravb_write(ndev, ravb_read(ndev, CXR35) | CXR35_SEL_MODIN,
> > CXR35);
> >
> >    We have ravb_mnodify() for that...
> >
> > > +
> > >  	/* 10BASE, Pause and Asym Pause is not supported */
> > >  	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
> > >  	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);
> > > @@ -2132,6 +2137,7 @@ static const struct ravb_hw_info rgeth_hw_info =
> {
> > >  	.aligned_tx = 1,
> > >  	.tx_counters = 1,
> > >  	.no_gptp = 1,
> > > +	.mii_rgmii_selection = 1,
> >
> >    I don't see where we handle MII?
> 
> See the commit message. "Currently only selecting RGMII is supported."
> We have a plan to support this at later.
> 

I have prepared a patch with "mii_rgmii_sel", will send next revision soon.

Regards,
Biju


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