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Message-ID: <OS0PR01MB59221BB67442BD5CA5898D9E86AB9@OS0PR01MB5922.jpnprd01.prod.outlook.com>
Date:   Fri, 1 Oct 2021 06:53:27 +0000
From:   Biju Das <biju.das.jz@...renesas.com>
To:     Sergey Shtylyov <s.shtylyov@....ru>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>
CC:     Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
        Andrew Lunn <andrew@...n.ch>,
        Sergei Shtylyov <sergei.shtylyov@...il.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Adam Ford <aford173@...il.com>,
        Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-renesas-soc@...r.kernel.org" 
        <linux-renesas-soc@...r.kernel.org>,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>
Subject: RE: [RFC/PATCH 18/18] ravb: Add set_feature support for RZ/G2L

Hi Sergei,

Thanks for the feedback.

> Subject: Re: [RFC/PATCH 18/18] ravb: Add set_feature support for RZ/G2L
> 
> On 9/23/21 5:08 PM, Biju Das wrote:
> 
> > This patch adds set_feature support for RZ/G2L.
> >
> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> > ---
> >  drivers/net/ethernet/renesas/ravb.h      | 32 ++++++++++++++
> >  drivers/net/ethernet/renesas/ravb_main.c | 56
> > +++++++++++++++++++++++-
> >  2 files changed, 87 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/ethernet/renesas/ravb.h
> > b/drivers/net/ethernet/renesas/ravb.h
> > index d42e8ea981df..2275f27c0672 100644
> > --- a/drivers/net/ethernet/renesas/ravb.h
> > +++ b/drivers/net/ethernet/renesas/ravb.h
> > @@ -209,6 +209,8 @@ enum ravb_reg {
> >  	CXR56	= 0x0770,	/* Documented for RZ/G2L only */
> >  	MAFCR	= 0x0778,
> >  	CSR0     = 0x0800,	/* Documented for RZ/G2L only */
> > +	CSR1     = 0x0804,	/* Documented for RZ/G2L only */
> > +	CSR2     = 0x0808,	/* Documented for RZ/G2L only */
> 
>    These are the TOE regs (CSR0 included), they only exist on RZ/G2L, no?

See just one line above you can see CSR0 registers and comments on the right clearly
mentions "/* Documented for RZ/G2L only */

OK will do CSR0 initialisation as part of this patch instead of patch #10.


> [...]
> > @@ -978,6 +980,36 @@ enum CSR0_BIT {
> >  	CSR0_RPE	= 0x00000020,
> >  };
> >
> 
>    *enum* CSR0_BIT should be here (as we concluded).

It is already there. See above.
As discussed above it will be moved from patch #10 to here.

> 
> > +enum CSR1_BIT {
> [...]
> > diff --git a/drivers/net/ethernet/renesas/ravb_main.c
> > b/drivers/net/ethernet/renesas/ravb_main.c
> > index 72aea5875bc5..641ae5553b64 100644
> > --- a/drivers/net/ethernet/renesas/ravb_main.c
> > +++ b/drivers/net/ethernet/renesas/ravb_main.c
> [...]
> > @@ -2290,7 +2308,38 @@ static void ravb_set_rx_csum(struct net_device
> > *ndev, bool enable)  static int ravb_set_features_rgeth(struct
> net_device *ndev,
> >  				   netdev_features_t features)
> >  {
> > -	/* Place holder */
> > +	netdev_features_t changed = features ^ ndev->features;
> > +	unsigned int reg;
> 
>    u32 reg;
> 
> > +	int error;
> > +
> > +	reg = ravb_read(ndev, CSR0);
> 
>    ... as this function returns u32.
> 
> > +
> > +	ravb_write(ndev, reg & ~(CSR0_RPE | CSR0_TPE), CSR0);
> > +	error = ravb_wait(ndev, CSR0, CSR0_RPE | CSR0_TPE, 0);
> > +	if (error) {
> > +		ravb_write(ndev, reg, CSR0);
> > +		return error;
> > +	}
> > +
> > +	if (changed & NETIF_F_RXCSUM) {
> > +		if (features & NETIF_F_RXCSUM)
> > +			ravb_write(ndev, CSR2_ALL, CSR2);
> > +		else
> > +			ravb_write(ndev, 0, CSR2);
> > +	}
> > +
> > +	if (changed & NETIF_F_HW_CSUM) {
> > +		if (features & NETIF_F_HW_CSUM) {
> > +			ravb_write(ndev, CSR1_ALL, CSR1);
> > +			ndev->features |= NETIF_F_CSUM_MASK;
> 
>    Hm, I don't understand this... it would be nice if someone
> knowledgeable about the offloads would look at this... Although, without
> the register documentation it's possibly vain...
> 
> > +		} else {
> > +			ravb_write(ndev, 0, CSR1);
> > +		}
> > +	}
> > +	ravb_write(ndev, reg, CSR0);
> > +
> > +	ndev->features = features;
> > +
> >  	return 0;
> >  }
> >
> > @@ -2432,6 +2481,11 @@ static const struct ravb_hw_info rgeth_hw_info =
> {
> >  	.set_feature = ravb_set_features_rgeth,
> >  	.dmac_init = ravb_dmac_init_rgeth,
> >  	.emac_init = ravb_emac_init_rgeth,
> > +	.net_hw_features = (NETIF_F_HW_CSUM | NETIF_F_RXCSUM),
> > +	.gstrings_stats = ravb_gstrings_stats_rgeth,
> > +	.gstrings_size = sizeof(ravb_gstrings_stats_rgeth),
> > +	.stats_len = ARRAY_SIZE(ravb_gstrings_stats_rgeth),
> 
>     These seem unrelated, couldn't it be moved to a spearate patch?

Ok will split into 2. Adding  set_feature support in first patch
and stats in second patch.

> 
> > +	.max_rx_len = RGETH_RX_BUFF_MAX + RAVB_ALIGN - 1,
> 
>    This seems unrelsated and misplaced too.

Agreed. It is a mistake. Will be taken care in next version.

Regards,
Biju

> 
> [...]
> 
> MBR, Sergey

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