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Message-ID: <CAMuHMdXKuvxnLBRXUgaT=kvvyE4LY9tzM8WiM1J+=4__kY8Stw@mail.gmail.com>
Date:   Tue, 5 Oct 2021 15:20:03 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Ulrich Hecht <uli+renesas@...nd.eu>
Cc:     Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        netdev <netdev@...r.kernel.org>,
        "David S. Miller" <davem@...emloft.net>, linux-can@...r.kernel.org,
        "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@...renesas.com>,
        Biju Das <biju.das.jz@...renesas.com>,
        Wolfram Sang <wsa@...nel.org>,
        Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
        Wolfgang Grandegger <wg@...ndegger.com>,
        Marc Kleine-Budde <mkl@...gutronix.de>,
        Jakub Kicinski <kuba@...nel.org>, mailhol.vincent@...adoo.fr,
        socketcan@...tkopp.net
Subject: Re: [PATCH 3/3] arm64: dts: r8a779a0: Add CANFD device node

Hi Uli,

On Fri, Sep 24, 2021 at 5:34 PM Ulrich Hecht <uli+renesas@...nd.eu> wrote:
> This patch adds CANFD device node for r8a779a0.
>
> Based on patch by Kazuya Mizuguchi.
>
> Signed-off-by: Ulrich Hecht <uli+renesas@...nd.eu>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi

> @@ -236,6 +243,54 @@
>                         #interrupt-cells = <2>;
>                 };
>
> +               canfd: can@...60000 {

Please preserve sort order (by unit address).

> +                       compatible = "renesas,r8a779a0-canfd";
> +                       reg = <0 0xe6660000 0 0x8000>;
> +                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> +                                       <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

Please add interrupt-names, so we can make the property required soon.

> +                       clocks = <&cpg CPG_MOD 328>,
> +                                <&cpg CPG_CORE R8A779A0_CLK_CANFD>,
> +                                <&can_clk>;
> +                       clock-names = "fck", "canfd", "can_clk";
> +                       assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>;
> +                       assigned-clock-rates = <40000000>;
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 328>;
> +                       status = "disabled";
> +
> +                       channel0 {
> +                               status = "disabled";
> +                       };
> +
> +                       channel1 {
> +                               status = "disabled";
> +                       };
> +
> +                       channel2 {
> +                               status = "disabled";
> +                       };
> +
> +                       channel3 {
> +                               status = "disabled";
> +                       };
> +
> +                       channel4 {
> +                               status = "disabled";
> +                       };
> +
> +                       channel5 {
> +                               status = "disabled";
> +                       };
> +
> +                       channel6 {
> +                               status = "disabled";
> +                       };
> +
> +                       channel7 {
> +                               status = "disabled";
> +                       };
> +               };
> +
>                 cmt0: timer@...f0000 {
>                         compatible = "renesas,r8a779a0-cmt0",
>                                      "renesas,rcar-gen3-cmt0";

With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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