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Message-ID: <YWHN1iDSelFQTPUC@lunn.ch>
Date: Sat, 9 Oct 2021 19:13:58 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Ansuel Smith <ansuelsmth@...il.com>
Cc: Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [net-next PATCH v2 11/15] dt-bindings: net: dsa: qca8k: Document
qca,sgmii-enable-pll
On Fri, Oct 08, 2021 at 02:22:21AM +0200, Ansuel Smith wrote:
> Document qca,sgmii-enable-pll binding used in the CPU nodes to
> enable SGMII PLL on MAC config.
>
> Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> ---
> Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.txt b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> index 208ee5bc1bbb..b9cccb657373 100644
> --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
> @@ -50,6 +50,12 @@ A CPU port node has the following optional node:
> managed entity. See
> Documentation/devicetree/bindings/net/fixed-link.txt
> for details.
> +- qca,sgmii-enable-pll : For SGMII CPU port, explicitly enable PLL, TX and RX
> + chain along with Signal Detection.
> + This should NOT be enabled for qca8327.
So how about -EINVAL for qca8327, and document it is not valid then.
> + This can be required for qca8337 switch with revision 2.
Maybe add a warning if enabled with revision < 2? I would not make it
an error, because there could be devices manufactured with a mixture
or v1 and v2 silicon. Do you have any idea how wide spread v1 is?
> + With CPU port set to sgmii and qca8337 it is advised
> + to set this unless a communication problem is observed.
Andrew
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