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Date:   Tue, 12 Oct 2021 09:15:29 +0200
From:   Oleksij Rempel <o.rempel@...gutronix.de>
To:     alexandru.tachici@...log.com
Cc:     andrew@...n.ch, davem@...emloft.net, devicetree@...r.kernel.org,
        hkallweit1@...il.com, kuba@...nel.org,
        linux-kernel@...r.kernel.org, linux@...linux.org.uk,
        netdev@...r.kernel.org, robh+dt@...nel.org
Subject: Re: [PATCH v3 1/8] ethtool: Add 10base-T1L link mode entry

On Mon, Oct 11, 2021 at 05:22:08PM +0300, alexandru.tachici@...log.com wrote:
> From: Alexandru Tachici <alexandru.tachici@...log.com>
> 
> Add entry for the 10base-T1L full duplex mode.
> 
> Signed-off-by: Alexandru Tachici <alexandru.tachici@...log.com>

Reviewed-by: Oleksij Rempel <o.rempel@...gutronix.de>

> ---
>  drivers/net/phy/phy-core.c   | 3 ++-
>  include/uapi/linux/ethtool.h | 1 +
>  net/ethtool/common.c         | 3 +++
>  3 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
> index 2870c33b8975..ed137c295a3d 100644
> --- a/drivers/net/phy/phy-core.c
> +++ b/drivers/net/phy/phy-core.c
> @@ -13,7 +13,7 @@
>   */
>  const char *phy_speed_to_str(int speed)
>  {
> -	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 92,
> +	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 93,
>  		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
>  		"If a speed or mode has been added please update phy_speed_to_str "
>  		"and the PHY settings array.\n");
> @@ -176,6 +176,7 @@ static const struct phy_setting settings[] = {
>  	/* 10M */
>  	PHY_SETTING(     10, FULL,     10baseT_Full		),
>  	PHY_SETTING(     10, HALF,     10baseT_Half		),
> +	PHY_SETTING(     10, FULL,     10baseT1L_Full		),
>  };
>  #undef PHY_SETTING
>  
> diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h
> index b6db6590baf0..2cdbd55566d6 100644
> --- a/include/uapi/linux/ethtool.h
> +++ b/include/uapi/linux/ethtool.h
> @@ -1661,6 +1661,7 @@ enum ethtool_link_mode_bit_indices {
>  	ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT	 = 89,
>  	ETHTOOL_LINK_MODE_100baseFX_Half_BIT		 = 90,
>  	ETHTOOL_LINK_MODE_100baseFX_Full_BIT		 = 91,
> +	ETHTOOL_LINK_MODE_10baseT1L_Full_BIT		 = 92,
>  	/* must be last entry */
>  	__ETHTOOL_LINK_MODE_MASK_NBITS
>  };
> diff --git a/net/ethtool/common.c b/net/ethtool/common.c
> index c63e0739dc6a..cbc2393a121b 100644
> --- a/net/ethtool/common.c
> +++ b/net/ethtool/common.c
> @@ -200,6 +200,7 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {
>  	__DEFINE_LINK_MODE_NAME(400000, CR4, Full),
>  	__DEFINE_LINK_MODE_NAME(100, FX, Half),
>  	__DEFINE_LINK_MODE_NAME(100, FX, Full),
> +	__DEFINE_LINK_MODE_NAME(10, T1L, Full),
>  };
>  static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
>  
> @@ -235,6 +236,7 @@ static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
>  #define __LINK_MODE_LANES_T1		1
>  #define __LINK_MODE_LANES_X		1
>  #define __LINK_MODE_LANES_FX		1
> +#define __LINK_MODE_LANES_T1L		1
>  
>  #define __DEFINE_LINK_MODE_PARAMS(_speed, _type, _duplex)	\
>  	[ETHTOOL_LINK_MODE(_speed, _type, _duplex)] = {		\
> @@ -348,6 +350,7 @@ const struct link_mode_info link_mode_params[] = {
>  	__DEFINE_LINK_MODE_PARAMS(400000, CR4, Full),
>  	__DEFINE_LINK_MODE_PARAMS(100, FX, Half),
>  	__DEFINE_LINK_MODE_PARAMS(100, FX, Full),
> +	__DEFINE_LINK_MODE_PARAMS(10, T1L, Full),
>  };
>  static_assert(ARRAY_SIZE(link_mode_params) == __ETHTOOL_LINK_MODE_MASK_NBITS);
>  
> -- 
> 2.25.1
> 
> 

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