netdev - Re: [PATCH v3 net-next 0/7] net: dsa: add support for RTL8365MB-VC

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Message-ID: <96111adf-205d-1cca-d05e-20bef29ed29e@arinc9.com>
Date:   Sat, 16 Oct 2021 12:13:26 +0300
From:   Arınç ÜNAL <arinc.unal@...nc9.com>
To:     Alvin Šipraga <alvin@...s.dk>,
        Linus Walleij <linus.walleij@...aro.org>,
        Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>
Cc:     Alvin Šipraga <alsi@...g-olufsen.dk>,
        netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 net-next 0/7] net: dsa: add support for RTL8365MB-VC

Tested on net-next master branch kernel on Asus RT-AC88U router using 
OpenWrt.

DT specification:

	ethernet-switch {
		compatible = "realtek,rtl8365mb";
		mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
		mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
		realtek,disable-leds;
		dsa,member = <1 0>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;

			port@0 {
				reg = <0>;
				label = "lan5";
				phy-handle = <&ethphy0>;
			};

			port@1 {
				reg = <1>;
				label = "lan6";
				phy-handle = <&ethphy1>;
			};

			port@2 {
				reg = <2>;
				label = "lan7";
				phy-handle = <&ethphy2>;
			};

			port@3 {
				reg = <3>;
				label = "lan8";
				phy-handle = <&ethphy3>;
			};

			port@6 {
				reg = <6>;
				label = "cpu";
				ethernet = <&sw0_p5>;
				phy-mode = "rgmii";
				tx-internal-delay-ps = <2000>;
				rx-internal-delay-ps = <2000>;

				fixed-link {
					speed = <1000>;
					full-duplex;
					pause;
				};
			};
		};

		mdio {
			compatible = "realtek,smi-mdio";
			#address-cells = <1>;
			#size-cells = <0>;

			ethphy0: phy@0 {
				reg = <0>;
			};

			ethphy1: phy@1 {
				reg = <1>;
			};

			ethphy2: phy@2 {
				reg = <2>;
			};

			ethphy3: phy@3 {
				reg = <3>;
			};
		};
	};

Tested-by: Arınç ÜNAL <arinc.unal@...nc9.com>