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Message-ID: <8eebd0aa-7345-7c4b-8435-067b703ad59a@quicinc.com>
Date:   Tue, 19 Oct 2021 20:42:16 +0800
From:   Jie Luo <quic_luoj@...cinc.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Luo Jie <luoj@...eaurora.org>, hkallweit1@...il.com,
        linux@...linux.org.uk, davem@...emloft.net, kuba@...nel.org,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        sricharan@...eaurora.org
Subject: Re: [PATCH v3 03/13] net: phy: at803x: improve the WOL feature


On 10/19/2021 8:29 PM, Andrew Lunn wrote:
>> Hi Andrew,
>>
>> when this register AT803X_INTR_STATUS bits are cleared after read, we can't
>> clear only WOL interrupt here.
> O.K. But you do have the value of the interrupt status register. So
> you could call phy_trigger_machine(phydev) if there are any other
> interrupt pending. They won't get lost that way.
>
> 	  Andrew
This make sense, thanks for this comment, will add it in the next patch set.

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