[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20211021100523.4i6xntouyiuhcl3q@gmail.com>
Date: Thu, 21 Oct 2021 11:05:23 +0100
From: Martin Habets <habetsm.xilinx@...il.com>
To: Erik Ekman <erik@...o.se>
Cc: Edward Cree <ecree.xilinx@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] sfc: Export fibre-specific supported link modes
On Tue, Oct 19, 2021 at 11:13:32PM +0200, Erik Ekman wrote:
> The 1/10GbaseT modes were set up for cards with SFP+ cages in
> 3497ed8c852a5 ("sfc: report supported link speeds on SFP connections").
> 10GbaseT was likely used since no 10G fibre mode existed.
>
> The missing fibre modes for 1/10G were added to ethtool.h in 5711a9822144
> ("net: ethtool: add support for 1000BaseX and missing 10G link modes")
> shortly thereafter.
>
> The user guide available at https://support-nic.xilinx.com/wp/drivers
> lists support for the following cable and transceiver types in section 2.9:
> - QSFP28 100G Direct Attach Cables
> - QSFP28 100G SR Optical Transceivers (with SR4 modules listed)
> - SFP28 25G Direct Attach Cables
> - SFP28 25G SR Optical Transceivers
> - QSFP+ 40G Direct Attach Cables
> - QSFP+ 40G Active Optical Cables
> - QSFP+ 40G SR4 Optical Transceivers
> - QSFP+ to SFP+ Breakout Direct Attach Cables
> - QSFP+ to SFP+ Breakout Active Optical Cables
> - SFP+ 10G Direct Attach Cables
> - SFP+ 10G SR Optical Transceivers
> - SFP+ 10G LR Optical Transceivers
> - SFP 1000BASE‐T Transceivers
> - 1G Optical Transceivers
> (From user guide issue 28. Issue 16 which also includes older cards like
> SFN5xxx/SFN6xxx has matching lists for 1/10/40G transceiver types.)
>
> Regarding SFP+ 10GBASE‐T transceivers the latest guide says:
> "Solarflare adapters do not support 10GBASE‐T transceiver modules."
This is because all SFN5xxx/SFN6xxx NICs are end-of-life now. We no longer
sell them. Many of them are still finding a 2nd or 3rd life.
> Tested using SFN5122F-R7 (with 2 SFP+ ports). Supported link modes do not change
> depending on module used (tested with 1000BASE-T, 1000BASE-BX10, 10GBASE-LR).
> Before:
>
> $ ethtool ext
> Settings for ext:
> Supported ports: [ FIBRE ]
> Supported link modes: 1000baseT/Full
> 10000baseT/Full
> Supported pause frame use: Symmetric Receive-only
> Supports auto-negotiation: No
> Supported FEC modes: Not reported
> Advertised link modes: Not reported
> Advertised pause frame use: No
> Advertised auto-negotiation: No
> Advertised FEC modes: Not reported
> Link partner advertised link modes: Not reported
> Link partner advertised pause frame use: No
> Link partner advertised auto-negotiation: No
> Link partner advertised FEC modes: Not reported
> Speed: 1000Mb/s
> Duplex: Full
> Auto-negotiation: off
> Port: FIBRE
> PHYAD: 255
> Transceiver: internal
> Current message level: 0x000020f7 (8439)
> drv probe link ifdown ifup rx_err tx_err hw
> Link detected: yes
>
> After:
>
> $ ethtool ext
> Settings for ext:
> Supported ports: [ FIBRE ]
> Supported link modes: 1000baseT/Full
> 1000baseX/Full
> 10000baseCR/Full
> 10000baseSR/Full
> 10000baseLR/Full
> Supported pause frame use: Symmetric Receive-only
> Supports auto-negotiation: No
> Supported FEC modes: Not reported
> Advertised link modes: Not reported
> Advertised pause frame use: No
> Advertised auto-negotiation: No
> Advertised FEC modes: Not reported
> Link partner advertised link modes: Not reported
> Link partner advertised pause frame use: No
> Link partner advertised auto-negotiation: No
> Link partner advertised FEC modes: Not reported
> Speed: 1000Mb/s
> Duplex: Full
> Auto-negotiation: off
> Port: FIBRE
> PHYAD: 255
> Transceiver: internal
> Supports Wake-on: g
> Wake-on: d
> Current message level: 0x000020f7 (8439)
> drv probe link ifdown ifup rx_err tx_err hw
> Link detected: yes
>
> Signed-off-by: Erik Ekman <erik@...o.se>
Acked-by: Martin Habets <habetsm.xilinx@...il.com>
> ---
> drivers/net/ethernet/sfc/mcdi_port_common.c | 37 +++++++++++++++------
> 1 file changed, 26 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/net/ethernet/sfc/mcdi_port_common.c b/drivers/net/ethernet/sfc/mcdi_port_common.c
> index 4bd3ef8f3384..c4fe3c48ac46 100644
> --- a/drivers/net/ethernet/sfc/mcdi_port_common.c
> +++ b/drivers/net/ethernet/sfc/mcdi_port_common.c
> @@ -132,16 +132,27 @@ void mcdi_to_ethtool_linkset(u32 media, u32 cap, unsigned long *linkset)
> case MC_CMD_MEDIA_SFP_PLUS:
> case MC_CMD_MEDIA_QSFP_PLUS:
> SET_BIT(FIBRE);
> - if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
> + if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN)) {
> SET_BIT(1000baseT_Full);
> - if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
> - SET_BIT(10000baseT_Full);
> - if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
> + SET_BIT(1000baseX_Full);
> + }
> + if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN)) {
> + SET_BIT(10000baseCR_Full);
> + SET_BIT(10000baseLR_Full);
> + SET_BIT(10000baseSR_Full);
> + }
> + if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) {
> SET_BIT(40000baseCR4_Full);
> - if (cap & (1 << MC_CMD_PHY_CAP_100000FDX_LBN))
> + SET_BIT(40000baseSR4_Full);
> + }
> + if (cap & (1 << MC_CMD_PHY_CAP_100000FDX_LBN)) {
> SET_BIT(100000baseCR4_Full);
> - if (cap & (1 << MC_CMD_PHY_CAP_25000FDX_LBN))
> + SET_BIT(100000baseSR4_Full);
> + }
> + if (cap & (1 << MC_CMD_PHY_CAP_25000FDX_LBN)) {
> SET_BIT(25000baseCR_Full);
> + SET_BIT(25000baseSR_Full);
> + }
> if (cap & (1 << MC_CMD_PHY_CAP_50000FDX_LBN))
> SET_BIT(50000baseCR2_Full);
> break;
> @@ -192,15 +203,19 @@ u32 ethtool_linkset_to_mcdi_cap(const unsigned long *linkset)
> result |= (1 << MC_CMD_PHY_CAP_100FDX_LBN);
> if (TEST_BIT(1000baseT_Half))
> result |= (1 << MC_CMD_PHY_CAP_1000HDX_LBN);
> - if (TEST_BIT(1000baseT_Full) || TEST_BIT(1000baseKX_Full))
> + if (TEST_BIT(1000baseT_Full) || TEST_BIT(1000baseKX_Full) ||
> + TEST_BIT(1000baseX_Full))
> result |= (1 << MC_CMD_PHY_CAP_1000FDX_LBN);
> - if (TEST_BIT(10000baseT_Full) || TEST_BIT(10000baseKX4_Full))
> + if (TEST_BIT(10000baseT_Full) || TEST_BIT(10000baseKX4_Full) ||
> + TEST_BIT(10000baseCR_Full) || TEST_BIT(10000baseLR_Full) ||
> + TEST_BIT(10000baseSR_Full))
> result |= (1 << MC_CMD_PHY_CAP_10000FDX_LBN);
> - if (TEST_BIT(40000baseCR4_Full) || TEST_BIT(40000baseKR4_Full))
> + if (TEST_BIT(40000baseCR4_Full) || TEST_BIT(40000baseKR4_Full) ||
> + TEST_BIT(40000baseSR4_Full))
> result |= (1 << MC_CMD_PHY_CAP_40000FDX_LBN);
> - if (TEST_BIT(100000baseCR4_Full))
> + if (TEST_BIT(100000baseCR4_Full) || TEST_BIT(100000baseSR4_Full))
> result |= (1 << MC_CMD_PHY_CAP_100000FDX_LBN);
> - if (TEST_BIT(25000baseCR_Full))
> + if (TEST_BIT(25000baseCR_Full) || TEST_BIT(25000baseSR_Full))
> result |= (1 << MC_CMD_PHY_CAP_25000FDX_LBN);
> if (TEST_BIT(50000baseCR2_Full))
> result |= (1 << MC_CMD_PHY_CAP_50000FDX_LBN);
> --
> 2.31.1
Powered by blists - more mailing lists