netdev - Re: [PATCH V2 mlx5-next 12/14] vfio/mlx5: Implement vfio

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Message-ID: <20211026152524.GX2744544@nvidia.com>
Date:   Tue, 26 Oct 2021 12:25:24 -0300
From:   Jason Gunthorpe <jgg@...dia.com>
To:     "Dr. David Alan Gilbert" <dgilbert@...hat.com>
Cc:     Alex Williamson <alex.williamson@...hat.com>,
        Yishai Hadas <yishaih@...dia.com>, bhelgaas@...gle.com,
        saeedm@...dia.com, linux-pci@...r.kernel.org, kvm@...r.kernel.org,
        netdev@...r.kernel.org, kuba@...nel.org, leonro@...dia.com,
        kwankhede@...dia.com, mgurtovoy@...dia.com, maorg@...dia.com,
        Cornelia Huck <cohuck@...hat.com>
Subject: Re: [PATCH V2 mlx5-next 12/14] vfio/mlx5: Implement vfio_pci driver
 for mlx5 devices

On Tue, Oct 26, 2021 at 03:51:21PM +0100, Dr. David Alan Gilbert wrote:

> > It's more than asking nicely, we define the device_state bits as
> > synchronous, the device needs to enter the state before returning from
> > the write operation or return an errno.
> 
> I don't see how it can be synchronous in practice; can it really wait to
> complete if it has to take many cycles to finish off an inflight DMA
> before it transitions?

The fencing of outbound DMAs in the device must be synchronous, how
could anything work if it isn't?

Jason