netdev - Re: igb: support PEROUT and EXTTS PTP pin functions

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Message-ID: <CAA0z7Bx7_SUpxwTLOFF3QVDim_o6jieJ_seX8K3hc238_L6RRQ@mail.gmail.com>
Date:   Thu, 28 Oct 2021 15:09:13 +0200
From:   Ruud Bos <kernel.hbk@...il.com>
To:     Jaideep Sagar <jaideep.sagar@...sight.com>
Cc:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "richardcochran@...il.com" <richardcochran@...il.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "jesse.brandeburg@...el.com" <jesse.brandeburg@...el.com>,
        "anthony.l.nguyen@...el.com" <anthony.l.nguyen@...el.com>
Subject: Re: igb: support PEROUT and EXTTS PTP pin functions

Hi Jaideep Sagar,

On Sun, Oct 24, 2021 at 8:57 AM Jaideep Sagar
<jaideep.sagar@...sight.com> wrote:
> I also needed the 1PPS-out on SDP from i350 to give as 1PPS-in to our Timing FPGA for PTP. In our design SDP2 is used and the patch _does not_ work with SDP2 or SDP3, but only with SDP0 and SDP1.
>
> The issue in igb_main.c and igb_ptp.c level/level_mask assignments.

Thanks for the heads up!
I only tested PEROUT using SDP0 and SDP1 and just assumed it would
work for SDP2 and SDP3 as well :-S

I will send out a v2 containing your suggestions later today.

> Food for thought: Adding TimeSync registers dump in igb_ethtool would be really nice to watch what is happening in realtime. Currently there are no TS registers in its dump.

Yes agreed, that would indeed be very helpful.

Ruud