netdev - Re: [PATCH bpf-next] riscv, bpf: Fix RV32 broken build, and silence RV64 warning

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Date:   Wed, 3 Nov 2021 14:35:50 +0100
From:   Björn Töpel <bjorn.topel@...il.com>
To:     Daniel Borkmann <daniel@...earbox.net>, jszhang@...nel.org
Cc:     Alexei Starovoitov <ast@...nel.org>,
        Netdev <netdev@...r.kernel.org>, bpf <bpf@...r.kernel.org>,
        Tong Tiangen <tongtiangen@...wei.com>,
        Luke Nelson <luke.r.nels@...il.com>,
        Xi Wang <xi.wang@...il.com>,
        linux-riscv <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH bpf-next] riscv, bpf: Fix RV32 broken build, and silence
 RV64 warning

On Wed, 3 Nov 2021 at 14:15, Daniel Borkmann <daniel@...earbox.net> wrote:
>
> On 11/3/21 12:54 PM, Björn Töpel wrote:
> > Commit 252c765bd764 ("riscv, bpf: Add BPF exception tables") only
> > addressed RV64, and broke the RV32 build [1]. Fix by gating the exception
> > tables code with CONFIG_ARCH_RV64I.
> >
> > Further, silence a "-Wmissing-prototypes" warning [2] in the RV64 BPF
> > JIT.
> >
> > [1] https://lore.kernel.org/llvm/202111020610.9oy9Rr0G-lkp@intel.com/
> > [2] https://lore.kernel.org/llvm/202110290334.2zdMyRq4-lkp@intel.com/
> >
> > Fixes: 252c765bd764 ("riscv, bpf: Add BPF exception tables")
> > Signed-off-by: Björn Töpel <bjorn@...nel.org>
> > ---
> > Tong/Daniel: The RV32 build has been broken since Thursday. I'll try
> > to fast-track a bit, and commit a quick-fix for it. Hope that's OK
> > with you, Tong!
> >
> > I've verified the build on my machine using riscv32 GCC 9.3.0 and
> > riscv64 GCC 11.2.0.
>
> Thanks for the fix Bjorn!
>
> > arch/riscv/mm/extable.c         | 4 ++--
> >   arch/riscv/net/bpf_jit_comp64.c | 2 ++
> >   2 files changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/riscv/mm/extable.c b/arch/riscv/mm/extable.c
> > index 18bf338303b6..ddb7d3b99e89 100644
> > --- a/arch/riscv/mm/extable.c
> > +++ b/arch/riscv/mm/extable.c
> > @@ -11,7 +11,7 @@
> >   #include <linux/module.h>
> >   #include <linux/uaccess.h>
> >
> > -#ifdef CONFIG_BPF_JIT
> > +#if defined(CONFIG_BPF_JIT) && defined(CONFIG_ARCH_RV64I)
> >   int rv_bpf_fixup_exception(const struct exception_table_entry *ex, struct pt_regs *regs);
> >   #endif
> >
> > @@ -23,7 +23,7 @@ int fixup_exception(struct pt_regs *regs)
> >       if (!fixup)
> >               return 0;
> >
> > -#ifdef CONFIG_BPF_JIT
> > +#if defined(CONFIG_BPF_JIT) && defined(CONFIG_ARCH_RV64I)
> >       if (regs->epc >= BPF_JIT_REGION_START && regs->epc < BPF_JIT_REGION_END)
> >               return rv_bpf_fixup_exception(fixup, regs);
> >   #endif
> > diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c
> > index 2ca345c7b0bf..f2a779c7e225 100644
> > --- a/arch/riscv/net/bpf_jit_comp64.c
> > +++ b/arch/riscv/net/bpf_jit_comp64.c
> > @@ -459,6 +459,8 @@ static int emit_call(bool fixed, u64 addr, struct rv_jit_context *ctx)
> >   #define BPF_FIXUP_OFFSET_MASK   GENMASK(26, 0)
> >   #define BPF_FIXUP_REG_MASK      GENMASK(31, 27)
> >
> > +int rv_bpf_fixup_exception(const struct exception_table_entry *ex,
> > +                             struct pt_regs *regs);
>
> I'm okay to take this as a quick fix, but if its not too much hassle, could we add a
> arch/riscv/include/asm/extable.h in similar fashion like arm64 or x86 where we move
> the ex_handler_bpf() signature there, did you have a chance to check?
>

OK! I've not looked into it yet!

There's a patch out from Jisheng on the RV list, which is starting
some consolidation work [1].

@Jisheng What do you think about adding type/handlers [2,3] as
arm64/x86 recently did, to your series?


Björn

[1] https://lore.kernel.org/linux-riscv/20211022001957.1eba8f04@xhacker/
[2] https://lore.kernel.org/linux-arm-kernel/20211019160219.5202-11-mark.rutland@arm.com/
[3] https://lore.kernel.org/lkml/20210908132525.211958725@linutronix.de/