lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 22 Nov 2021 16:54:05 +0100
From:   Geert Uytterhoeven <geert+renesas@...der.be>
To:     Tony Lindgren <tony@...mide.com>,
        Russell King <linux@...linux.org.uk>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Paul Walmsley <paul@...an.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Ludovic Desroches <ludovic.desroches@...rochip.com>,
        Tero Kristo <kristo@...nel.org>,
        Jonathan Cameron <jic23@...nel.org>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Lorenzo Bianconi <lorenzo.bianconi83@...il.com>,
        Benoit Parrot <bparrot@...com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Andrew Jeffery <andrew@...id.au>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Joel Stanley <joel@....id.au>,
        Ping-Ke Shih <pkshih@...ltek.com>,
        Kalle Valo <kvalo@...eaurora.org>,
        "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Magnus Damm <magnus.damm@...il.com>,
        Eduardo Valentin <edubezval@...il.com>,
        Keerthy <j-keerthy@...com>,
        "Rafael J . Wysocki" <rafael@...nel.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Amit Kucheria <amitk@...nel.org>,
        Zhang Rui <rui.zhang@...el.com>,
        Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-omap@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, linux-iio@...r.kernel.org,
        linux-media@...r.kernel.org, linux-mmc@...r.kernel.org,
        linux-aspeed@...ts.ozlabs.org, openbmc@...ts.ozlabs.org,
        linux-wireless@...r.kernel.org, netdev@...r.kernel.org,
        linux-gpio@...r.kernel.org, linux-pm@...r.kernel.org,
        alsa-devel@...a-project.org,
        Geert Uytterhoeven <geert+renesas@...der.be>
Subject: [PATCH/RFC 12/17] pinctrl: aspeed: Use bitfield helpers

Use the field_{get,prep}() helpers, instead of open-coding the same
operations.

Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
---
Compile-tested only.
Marked RFC, as this depends on [PATCH 01/17], but follows a different
path to upstream.
---
 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 3 ++-
 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 3 ++-
 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 3 ++-
 drivers/pinctrl/aspeed/pinctrl-aspeed.c    | 5 +++--
 drivers/pinctrl/aspeed/pinmux-aspeed.c     | 6 ++++--
 5 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
index bfed0e2746437b4a..bfb2a7b229915a68 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
@@ -2,6 +2,7 @@
 /*
  * Copyright (C) 2016 IBM Corp.
  */
+#include <linux/bitfield.h>
 #include <linux/bitops.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -2551,7 +2552,7 @@ static int aspeed_g4_sig_expr_set(struct aspeed_pinmux_data *ctx,
 	for (i = 0; i < expr->ndescs; i++) {
 		const struct aspeed_sig_desc *desc = &expr->descs[i];
 		u32 pattern = enable ? desc->enable : desc->disable;
-		u32 val = (pattern << __ffs(desc->mask));
+		u32 val = field_prep(desc->mask, pattern);
 
 		if (!ctx->maps[desc->ip])
 			return -ENODEV;
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 4c0d26606b6cc7d6..8cc6d9c1f1c78296 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -2,6 +2,7 @@
 /*
  * Copyright (C) 2016 IBM Corp.
  */
+#include <linux/bitfield.h>
 #include <linux/bitops.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -2724,7 +2725,7 @@ static int aspeed_g5_sig_expr_set(struct aspeed_pinmux_data *ctx,
 	for (i = 0; i < expr->ndescs; i++) {
 		const struct aspeed_sig_desc *desc = &expr->descs[i];
 		u32 pattern = enable ? desc->enable : desc->disable;
-		u32 val = (pattern << __ffs(desc->mask));
+		u32 val = field_prep(desc->mask, pattern);
 		struct regmap *map;
 
 		map = aspeed_g5_acquire_regmap(ctx, desc->ip);
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
index a3fa03bcd9a30577..00f7b69a74e9e743 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 /* Copyright (C) 2019 IBM Corp. */
+#include <linux/bitfield.h>
 #include <linux/bitops.h>
 #include <linux/init.h>
 #include <linux/io.h>
@@ -2649,7 +2650,7 @@ static int aspeed_g6_sig_expr_set(struct aspeed_pinmux_data *ctx,
 	for (i = 0; i < expr->ndescs; i++) {
 		const struct aspeed_sig_desc *desc = &expr->descs[i];
 		u32 pattern = enable ? desc->enable : desc->disable;
-		u32 val = (pattern << __ffs(desc->mask));
+		u32 val = field_prep(desc->mask, pattern);
 		bool is_strap;
 
 		if (!ctx->maps[desc->ip])
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
index c94e24aadf922d2a..839ac48f75836352 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2016 IBM Corp.
  */
 
+#include <linux/bitfield.h>
 #include <linux/mfd/syscon.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
@@ -547,7 +548,7 @@ int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
 		return rc;
 
 	pmap = find_pinconf_map(pdata, param, MAP_TYPE_VAL,
-			(val & pconf->mask) >> __ffs(pconf->mask));
+				field_get(pconf->mask, val));
 
 	if (!pmap)
 		return -EINVAL;
@@ -595,7 +596,7 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
 		if (WARN_ON(!pmap))
 			return -EINVAL;
 
-		val = pmap->val << __ffs(pconf->mask);
+		val = field_prep(pconf->mask, pmap->val);
 
 		rc = regmap_update_bits(pdata->scu, pconf->reg,
 					pconf->mask, val);
diff --git a/drivers/pinctrl/aspeed/pinmux-aspeed.c b/drivers/pinctrl/aspeed/pinmux-aspeed.c
index 4aa46383c2c533f0..61ddd550439325ee 100644
--- a/drivers/pinctrl/aspeed/pinmux-aspeed.c
+++ b/drivers/pinctrl/aspeed/pinmux-aspeed.c
@@ -3,6 +3,8 @@
 
 /* Pieces to enable drivers to implement the .set callback */
 
+#include <linux/bitfield.h>
+
 #include "pinmux-aspeed.h"
 
 static const char *const aspeed_pinmux_ips[] = {
@@ -17,7 +19,7 @@ static inline void aspeed_sig_desc_print_val(
 	pr_debug("Want %s%X[0x%08X]=0x%X, got 0x%X from 0x%08X\n",
 			aspeed_pinmux_ips[desc->ip], desc->reg,
 			desc->mask, enable ? desc->enable : desc->disable,
-			(rv & desc->mask) >> __ffs(desc->mask), rv);
+			field_get(desc->mask, rv), rv);
 }
 
 /**
@@ -55,7 +57,7 @@ int aspeed_sig_desc_eval(const struct aspeed_sig_desc *desc,
 	aspeed_sig_desc_print_val(desc, enabled, raw);
 	want = enabled ? desc->enable : desc->disable;
 
-	return ((raw & desc->mask) >> __ffs(desc->mask)) == want;
+	return field_get(desc->mask, raw) == want;
 }
 
 /**
-- 
2.25.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ