netdev - RE: [PATCH net-next 2/2] net: optimize skb_postpull

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Date:   Thu, 25 Nov 2021 14:29:14 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Eric Dumazet' <edumazet@...gle.com>
CC:     Eric Dumazet <eric.dumazet@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        netdev <netdev@...r.kernel.org>
Subject: RE: [PATCH net-next 2/2] net: optimize skb_postpull_rcsum()

There is another optimisation you can do that removes a conditional
from the end of the checksum generation.

The 'adc' sum is reduced to 16 bits leaving a value [1..0xffff].
This is then inverted to get the checksum, but the range is
then [0..0xfffe].
So 0 then has to be converted to 0xffff.

If you add 1 to thw inut checksum one of the csum_partial() calls
the adc sum is one too big, so the inverted value is one too small.
Adding 1 to the inverted value fixes this and leaves a checksum
in the correct range.

Potentially the invert+increment can be done as a negate prior
to the final masking with 0xffff.
(Which the compiler may well sort out for you.)

You do need to know 'early' that the checksum is going to get
inverted - or too many places might add in the extra 'one'.

On 64bit systems the 'input checksum' to csum_partial() can
(almost certainly) be made a long - with a proviso that the
value must not exceed 2**56 because the function might want
to add a partial word to it.

I'm also not sure how well any of this runs on mips-like cpu
that don't have a carry flag (I think this includes riscV).
On 64bit cpu it may be best to add 32bit values to 64bit registers.

With 2 memory read ports it is even possibly that an x86 cpu
can do 8 bytes/clock by adding 32 bit values to two registers.
However the reads would have to be aligned and arranged to
avoid cache bank conflicts.

	David

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