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Message-ID: <20211129101315.16372-383-nic_swsd@realtek.com>
Date: Mon, 29 Nov 2021 18:13:13 +0800
From: Hayes Wang <hayeswang@...ltek.com>
To: <hkallweit1@...il.com>
CC: <netdev@...r.kernel.org>, <nic_swsd@...ltek.com>,
Hayes Wang <hayeswang@...ltek.com>
Subject: [RFC PATCH 2/4] r8169: add type2 access functions
The type2 functions are used to access the OOB registers of RTL8111EP
and RTL8111FP(RTL8117). The OOB registers are used to control the
settings about dash.
Signed-off-by: Hayes Wang <hayeswang@...ltek.com>
---
drivers/net/ethernet/realtek/r8169.h | 3 ++
drivers/net/ethernet/realtek/r8169_main.c | 39 +++++++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/drivers/net/ethernet/realtek/r8169.h b/drivers/net/ethernet/realtek/r8169.h
index 8da4b66b71b5..7db647b4796f 100644
--- a/drivers/net/ethernet/realtek/r8169.h
+++ b/drivers/net/ethernet/realtek/r8169.h
@@ -77,3 +77,6 @@ u16 rtl8168h_2_get_adc_bias_ioffset(struct rtl8169_private *tp);
u8 rtl8168d_efuse_read(struct rtl8169_private *tp, int reg_addr);
void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,
enum mac_version ver);
+
+u32 r8168_type2_read(struct rtl8169_private *tp, u32 addr);
+void r8168_type2_write(struct rtl8169_private *tp, u8 mask, u32 addr, u32 val);
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index fd295bcd125c..eb56b91fe41b 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -1071,6 +1071,45 @@ static u16 rtl_ephy_read(struct rtl8169_private *tp, int reg_addr)
RTL_R32(tp, EPHYAR) & EPHYAR_DATA_MASK : ~0;
}
+static u32 r8168_dash_adjust_addr(struct rtl8169_private *tp, u32 addr)
+{
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_49 ... RTL_GIGA_MAC_VER_51:
+ return ((addr & 0xf000) << 8) | (addr & 0xfff);
+ case RTL_GIGA_MAC_VER_52 ... RTL_GIGA_MAC_VER_53:
+ return ((addr & 0xfff000) << 6) | (addr & 0xfff);
+ default:
+ WARN_ON_ONCE(1);
+ return (addr & 0xfff);
+ }
+}
+
+u32 r8168_type2_read(struct rtl8169_private *tp, u32 addr)
+{
+ u32 cmd = ERIAR_READ_CMD | ERIAR_OOB | ERIAR_MASK_1111;
+
+ cmd |= r8168_dash_adjust_addr(tp, addr);
+ RTL_W32(tp, ERIAR, cmd);
+
+ return rtl_loop_wait_high(tp, &rtl_eriar_cond, 100, 100) ?
+ RTL_R32(tp, ERIDR) : ~0;
+}
+
+void r8168_type2_write(struct rtl8169_private *tp, u8 mask, u32 addr, u32 val)
+{
+ u32 cmd = ERIAR_WRITE_CMD | ERIAR_OOB |
+ ((u32)mask & 0x0f) << ERIAR_MASK_SHIFT;
+
+ if (WARN(addr & 3 || !mask, "addr: 0x%x, mask: 0x%08x\n", addr, mask))
+ return;
+
+ RTL_W32(tp, ERIDR, val);
+ cmd |= r8168_dash_adjust_addr(tp, addr);
+ RTL_W32(tp, ERIAR, cmd);
+
+ rtl_loop_wait_low(tp, &rtl_eriar_cond, 100, 100);
+}
+
static u32 r8168dp_ocp_read(struct rtl8169_private *tp, u16 reg)
{
RTL_W32(tp, OCPAR, 0x0fu << 12 | (reg & 0x0fff));
--
2.31.1
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