lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 7 Dec 2021 13:59:17 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Ricardo Martinez <ricardo.martinez@...ux.intel.com>
Cc:     netdev@...r.kernel.org, linux-wireless@...r.kernel.org,
        kuba@...nel.org, davem@...emloft.net, johannes@...solutions.net,
        ryazanov.s.a@...il.com, loic.poulain@...aro.org,
        m.chetan.kumar@...el.com, chandrashekar.devegowda@...el.com,
        linuxwwan@...el.com, chiranjeevi.rapolu@...ux.intel.com,
        haijun.liu@...iatek.com, amir.hanania@...el.com,
        dinesh.sharma@...el.com, eliot.lee@...el.com,
        mika.westerberg@...ux.intel.com, moises.veleta@...el.com,
        pierre-louis.bossart@...el.com, muralidharan.sethuraman@...el.com,
        Soumya.Prakash.Mishra@...el.com, sreehari.kancharla@...el.com,
        suresh.nagaraj@...el.com
Subject: Re: [PATCH net-next v3 06/12] net: wwan: t7xx: Data path HW layer

On Mon, Dec 06, 2021 at 07:47:05PM -0700, Ricardo Martinez wrote:
> From: Haijun Liu <haijun.liu@...iatek.com>
> 
> Data Path Modem AP Interface (DPMAIF) HW layer provides HW abstraction
> for the upper layer (DPMAIF HIF). It implements functions to do the HW
> configuration, TX/RX control and interrupt handling.

...

> +	ret = readx_poll_timeout_atomic(ioread32, hw_info->pcie_base + DPMAIF_AO_UL_AP_L2TIMR0,
> +					value, (value & ul_intr_enable) != ul_intr_enable, 0,
> +					DPMAIF_CHECK_INIT_TIMEOUT_US);
> +	if (ret)
> +		return ret;

...

> +	ret = readx_poll_timeout_atomic(ioread32, hw_info->pcie_base + DPMAIF_AO_UL_APDL_L2TIMR0,
> +					value, (value & ul_intr_enable) != ul_intr_enable, 0,
> +					DPMAIF_CHECK_INIT_TIMEOUT_US);
> +	if (ret)
> +		return ret;

...

> +	ret = readx_poll_timeout_atomic(ioread32, hw_info->pcie_base + DPMAIF_AO_UL_AP_L2TIMR0,
> +					value, (value & ul_int_que_done) == ul_int_que_done, 0,
> +					DPMAIF_CHECK_TIMEOUT_US);
> +	if (ret)
> +		dev_err(dpmaif_ctrl->dev,
> +			"Could not mask the UL interrupt. DPMAIF_AO_UL_AP_L2TIMR0 is 0x%x\n",
> +			value);

I would recommend to add a small patch that extends iopoll.h by ioreadXX() variants.

Or as alternative just define it here at the top of the file (or in one of the
header if it's used more than in one module) so we may move it to the iopoll.h
in the future:


#define ioread32_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \
	readx_poll_timeout_atomic(ioread32, addr, val, cond, delay_us, timeout_us)


-- 
With Best Regards,
Andy Shevchenko


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ