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Message-Id: <20211209100702.5609-2-josright123@gmail.com>
Date: Thu, 9 Dec 2021 18:07:01 +0800
From: JosephCHANG <josright123@...il.com>
To: "David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Joseph CHANG <josright123@...il.com>,
joseph_chang@...icom.com.tw
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2, 1/2] yaml: Add dm9051 SPI network yaml file
For support davicom dm9051 device tree config
Signed-off-by: JosephCHANG <josright123@...il.com>
---
.../bindings/net/davicom,dm9051.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/davicom,dm9051.yaml
diff --git a/Documentation/devicetree/bindings/net/davicom,dm9051.yaml b/Documentation/devicetree/bindings/net/davicom,dm9051.yaml
new file mode 100644
index 000000000000..5e9ce2920bd3
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/davicom,dm9051.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/davicom,dm9051.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Davicom DM9051 SPI Ethernet Controller
+
+maintainers:
+ - Joseph CHANG <josright123@...il.com>
+
+description: |
+ The DM9051 is a fully integrated and cost-effective low pin count single
+ chip Fast Ethernet controller with a Serial Peripheral Interface (SPI).
+
+allOf:
+ - $ref: ethernet-controller.yaml#
+
+properties:
+ compatible:
+ const: davicom,dm9051
+
+ reg:
+ maxItems: 1
+
+ spi-max-frequency:
+ maximum: 45000000
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - spi-max-frequency
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ /* for Raspberry Pi with pin control stuff for GPIO irq */
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ dm9051@0 {
+ compatible = "davicom,dm9051";
+ reg = <0>; /* spi chip select */
+ pinctrl-names = "default";
+ pinctrl-0 = <ð_int_pins>;
+ interrupt-parent = <&gpio>;
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ spi-max-frequency = <31200000>;
+ };
+ };
+ gpio {
+ eth_int_pins {
+ brcm,pins = <26>;
+ brcm,function = <0>; /* in */
+ brcm,pull = <0>; /* none */
+ };
+ };
--
2.20.1
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