netdev - Re: [PATCH net-next 0/3] Add Possiblity to Reset PHY After Power-up

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Message-ID: <20211214122355.GB13490@francesco-nb.int.toradex.com>
Date:   Tue, 14 Dec 2021 13:23:55 +0100
From:   Francesco Dolcini <francesco.dolcini@...adex.com>
To:     Philippe Schenker <philippe.schenker@...adex.com>
Cc:     netdev@...r.kernel.org, Joakim Zhang <qiangqing.zhang@....com>,
        "David S . Miller" <davem@...emloft.net>,
        Russell King <linux@...linux.org.uk>,
        Andrew Lunn <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Francesco Dolcini <francesco.dolcini@...adex.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Fabio Estevam <festevam@...il.com>,
        Fugang Duan <fugang.duan@....com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 0/3] Add Possiblity to Reset PHY After Power-up

On Tue, Dec 14, 2021 at 01:16:35PM +0100, Philippe Schenker wrote:
> We do have a hardware design in which the ethernet phy regulator and
> reset are controlled by software. The ethernet PHY is a Microchip
> KSZ9131 [1] and the power sequencing requires a reset after the power
> goes up.
> 
> In our case the ethernet PHY is connected to a Freescale FEC and the
> driver is shutting down the regulator on suspend, however on the resume
> path the reset signal is never asserted and because of that the
> ethernet is not working anymore.
> 
> To solve this adds a new phy_reset_after_power_on() function, similar
> to the existing phy_reset_after_clk_enable(), and call it in the fec
> resume path after the regulator is switched on as suggested by
> Joakim Zhang <qiangqing.zhang@....com>.
> 
> [1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002841C.pdf

For the whole series.

Reviewed-by: Francesco Dolcini <francesco.dolcini@...adex.com>