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Message-ID: <YdR5v0itgRDCN1iA@lunn.ch>
Date: Tue, 4 Jan 2022 17:45:51 +0100
From: Andrew Lunn <andrew@...n.ch>
To: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
Corentin Labbe <clabbe.montjoie@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org
Subject: Re: [PATCH net-next 2/2] net: phy: marvell: configure RGMII delays
for 88E1118
On Tue, Jan 04, 2022 at 04:38:19PM +0000, Russell King (Oracle) wrote:
> Corentin Labbe reports that the SSI 1328 does not work when allowing
> the PHY to operate at gigabit speeds, but does work with the generic
> PHY driver.
>
> This appears to be because m88e1118_config_init() writes a fixed value
> to the MSCR register, claiming that this is to enable 1G speeds.
> However, this always sets bits 4 and 5, enabling RGMII transmit and
> receive delays. The suspicion is that the original board this was
> added for required the delays to make 1G speeds work.
>
> Add the necessary configuration for RGMII delays for the 88E1118 to
> bring this into line with the requirements for RGMII support, and thus
> make the SSI 1328 work.
>
> Corentin Labbe has tested this on gemini-ssi1328 and gemini-ns2502.
>
> Reported-by: Corentin Labbe <clabbe.montjoie@...il.com>
> Tested-by: Corentin Labbe <clabbe.montjoie@...il.com>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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