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Date: Tue, 18 Jan 2022 16:50:23 -0800 From: Jakub Kicinski <kuba@...nel.org> To: Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp> Cc: "David S . Miller" <davem@...emloft.net>, Giuseppe Cavallaro <peppe.cavallaro@...com>, Alexandre Torgue <alexandre.torgue@...com>, Jose Abreu <joabreu@...opsys.com>, netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, nobuhiro1.iwamatsu@...hiba.co.jp Subject: Re: [PATCH 0/2] net: stmmac: dwmac-visconti: Fix bit definitions and clock configuration for RMII mode On Tue, 18 Jan 2022 14:39:48 +0900 Yuji Ishikawa wrote: > This series is a fix for RMII/MII operation mode of the dwmac-visconti driver. > It is composed of two parts: > > * 1/2: fix constant definitions for cleared bits in ETHER_CLK_SEL register > * 2/2: fix configuration of ETHER_CLK_SEL register for running in RMII operation mode. Please add appropriate Fixes tag pointing to the commits where the buggy code was introduced, even if it's the initial commit adding the driver.
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