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Message-ID: <20220120070226.1492-2-biao.huang@mediatek.com>
Date: Thu, 20 Jan 2022 15:02:18 +0800
From: Biao Huang <biao.huang@...iatek.com>
To: David Miller <davem@...emloft.net>,
Rob Herring <robh+dt@...nel.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Fabien Parent <fparent@...libre.com>
CC: Jakub Kicinski <kuba@...nel.org>, Felix Fietkau <nbd@....name>,
"John Crispin" <john@...ozen.org>,
Sean Wang <sean.wang@...iatek.com>,
Mark Lee <Mark-MC.Lee@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
<netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
Biao Huang <biao.huang@...iatek.com>,
Yinghua Pan <ot_yinghua.pan@...iatek.com>,
<srv_heupstream@...iatek.com>,
Macpaul Lin <macpaul.lin@...iatek.com>
Subject: [PATCH net-next v1 1/9] net: ethernet: mtk-star-emac: store bit_clk_div in compat structure
From: Fabien Parent <fparent@...libre.com>
Not all the SoC are using the same clock divider. Move the divider into
a compat structure specific to the SoCs.
Signed-off-by: Biao Huang <biao.huang@...iatek.com>
Signed-off-by: Fabien Parent <fparent@...libre.com>
---
drivers/net/ethernet/mediatek/mtk_star_emac.c | 23 +++++++++++++++----
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_star_emac.c b/drivers/net/ethernet/mediatek/mtk_star_emac.c
index 1d5dd2015453..26f5020f2e9c 100644
--- a/drivers/net/ethernet/mediatek/mtk_star_emac.c
+++ b/drivers/net/ethernet/mediatek/mtk_star_emac.c
@@ -17,6 +17,7 @@
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/of_mdio.h>
#include <linux/of_net.h>
#include <linux/platform_device.h>
@@ -232,6 +233,10 @@ struct mtk_star_ring {
unsigned int tail;
};
+struct mtk_star_compat {
+ unsigned char bit_clk_div;
+};
+
struct mtk_star_priv {
struct net_device *ndev;
@@ -257,6 +262,8 @@ struct mtk_star_priv {
int duplex;
int pause;
+ const struct mtk_star_compat *compat_data;
+
/* Protects against concurrent descriptor access. */
spinlock_t lock;
@@ -899,7 +906,7 @@ static void mtk_star_init_config(struct mtk_star_priv *priv)
regmap_write(priv->regs, MTK_STAR_REG_SYS_CONF, val);
regmap_update_bits(priv->regs, MTK_STAR_REG_MAC_CLK_CONF,
MTK_STAR_MSK_MAC_CLK_CONF,
- MTK_STAR_BIT_CLK_DIV_10);
+ priv->compat_data->bit_clk_div);
}
static void mtk_star_set_mode_rmii(struct mtk_star_priv *priv)
@@ -1461,6 +1468,7 @@ static int mtk_star_probe(struct platform_device *pdev)
priv = netdev_priv(ndev);
priv->ndev = ndev;
+ priv->compat_data = of_device_get_match_data(&pdev->dev);
SET_NETDEV_DEV(ndev, dev);
platform_set_drvdata(pdev, ndev);
@@ -1556,10 +1564,17 @@ static int mtk_star_probe(struct platform_device *pdev)
return devm_register_netdev(dev, ndev);
}
+static struct mtk_star_compat mtk_star_mt8516_compat = {
+ .bit_clk_div = MTK_STAR_BIT_CLK_DIV_10,
+};
+
static const struct of_device_id mtk_star_of_match[] = {
- { .compatible = "mediatek,mt8516-eth", },
- { .compatible = "mediatek,mt8518-eth", },
- { .compatible = "mediatek,mt8175-eth", },
+ { .compatible = "mediatek,mt8516-eth",
+ .data = &mtk_star_mt8516_compat },
+ { .compatible = "mediatek,mt8518-eth",
+ .data = &mtk_star_mt8516_compat },
+ { .compatible = "mediatek,mt8175-eth",
+ .data = &mtk_star_mt8516_compat },
{ }
};
MODULE_DEVICE_TABLE(of, mtk_star_of_match);
--
2.25.1
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