netdev - Re: [PATCH v12, 2/2] net: Add dm9051 driver

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Message-ID: <CAHp75Vc9pJMNfW2roUbdrcxCSvyGboTsJC0oTDCcTAS5bmF08w@mail.gmail.com>
Date:   Fri, 21 Jan 2022 12:37:00 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Joseph CHAMG <josright123@...il.com>
Cc:     "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, joseph_chang@...icom.com.tw,
        netdev <netdev@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Andrew Lunn <andrew@...n.ch>, Leon Romanovsky <leon@...nel.org>
Subject: Re: [PATCH v12, 2/2] net: Add dm9051 driver

On Fri, Jan 21, 2022 at 6:15 AM Joseph CHAMG <josright123@...il.com> wrote:
>
> v1-v4
>
> Add davicom dm9051 spi ethernet driver. The driver work for the
> device platform with spi master
>
> Test ok with raspberry pi 2 and pi 4, the spi configure used in
> my raspberry pi 4 is spi0.1, spi speed 31200000, and INT by pin 26.
>
> v5
>
> Work to eliminate the wrappers to be clear for read, swapped to
> phylib for phy connection tasks.
>
> Tested with raspberry pi 4. Test for netwroking function, CAT5
> cable unplug/plug and also ethtool detect for link state, and
> all are ok.
>
> v6
>
> remove the redundant code that phylib has support,
> adjust to be the reasonable sequence,
> fine tune comments, add comments for pause function support
>
> Tested with raspberry pi 4. Test for netwroking function, CAT5
> cable unplug/plug and also ethtool detect for link state, and
> all are ok.
>
> v7
>
> read/write registers must return error code to the callet,
> add to enable pause processing
>
> v8
>
> not parmanently set MAC by .ndo_set_mac_address
>
> correct rx function such as clear ISR,
> inblk avoid stack buffer,
> simple skb buffer process and
> easy use netif_rx_ni.
>
> simplely queue init and wake the queues,
> limit the start_xmit function use netif_stop_queue.
>
> descript that schedule delay is essential
> for tx_work and rxctrl_work
>
> eliminate ____cacheline_aligned and
> add static int msg_enable.
>
> v9
>
> use phylib, no need 'select MII' in Kconfig,
> make it clear in dm9051_xfer when using spi_sync,
> improve the registers read/write so that error code
> return as far as possible up the call stack.
>
> v10
>
> use regmap APIs for SPI and MDIO,
> modify to correcting such as include header files
> and program check styles
>
> v11
>
> eliminate the redundant code for struct regmap_config data
> use regmap_read_poll_timeout
> use corresponding regmap APIs, i.e. MDIO, SPI
> all read/write registers by regmap
> all read/write registers with mutex lock by regmap
> problem: regmap MDIO and SPI has no .reg_update_bits, I write it
> in the driver
> problem: this chip can support bulk read/write to rx/tx data, but
> can not support bulk read/write to continue registers, so need
> read/write register one by one
>
> v12
>
> correctly use regmap bulk read/write/update_bits APIs
> use mdiobus to work to phylib and to this driver
> fine tune to arrange the source code to better usage

This is not tagged properly. Also, I specifically removed everything
else to point out, please, read finally the article [1] and write a
proper commit message. And move changelog under the cutter '--- '
line. Without doing these two things nobody can do anything with your
contribution.

[1]: https://cbea.ms/git-commit/


-- 
With Best Regards,
Andy Shevchenko