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Message-Id: <20220127121714.22915-1-yuji2.ishikawa@toshiba.co.jp>
Date:   Thu, 27 Jan 2022 21:17:13 +0900
From:   Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp>
To:     "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>
Cc:     Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Jose Abreu <joabreu@...opsys.com>, netdev@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        nobuhiro1.iwamatsu@...hiba.co.jp, yuji2.ishikawa@...hiba.co.jp
Subject: [PATCH 0/1] net: stmmac: dwmac-visconti: Avoid updating hardware register for unexpected speed requst

Function visconti_eth_fix_mac_speed() should not change a register when an unexpected speed value is passed.

Yuji Ishikawa (1):
  net: stmmac: dwmac-visconti: No change to ETHER_CLOCK_SEL for
    unexpected speed request.

 drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

-- 
2.17.1


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