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Message-ID: <59052a6a-ddbe-fde5-2eab-ce90d958697c@intel.com>
Date:   Mon, 31 Jan 2022 20:10:26 +0200
From:   "Neftin, Sasha" <sasha.neftin@...el.com>
To:     Thomas Bogendoerfer <tsbogend@...ha.franken.de>
CC:     Jesse Brandeburg <jesse.brandeburg@...el.com>,
        Tony Nguyen <anthony.l.nguyen@...el.com>,
        "David S. Miller" <davem@...emloft.net>,
        "Jakub Kicinski" <kuba@...nel.org>,
        <intel-wired-lan@...ts.osuosl.org>, <netdev@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        "Fuxbrumer, Devora" <devora.fuxbrumer@...el.com>,
        "Ruinskiy, Dima" <dima.ruinskiy@...el.com>,
        "Nguyen, Anthony L" <anthony.l.nguyen@...el.com>,
        "Neftin, Sasha" <sasha.neftin@...el.com>
Subject: Re: [PATCH net] net: e1000e: Recover at least in-memory copy of NVM
 checksum

On 1/31/2022 18:41, Thomas Bogendoerfer wrote:
> On Mon, Jan 31, 2022 at 12:51:07PM +0200, Neftin, Sasha wrote:
>> Hello Thomas,
>> For security reasons starting from the TGL platform SPI controller will be
>> locked for SW access. I've double-checked with our HW architect, not from
>> SPT, from TGP. So, first, we can change the mac type e1000_pch_cnp to
>> e1000_pch_tgp (as fix for initial patch)
> 
> ok, that would fix the mentioned bug. Are you sending a patch for that ?
Sure. I will send patch for this and inform you
> 
>> Do we want (second) to allow HW initialization with the "wrong" NVM
>> checksum? It could cause unexpected (HW) behavior in the future. Even if you
>> will "recover" check in shadow RAM - there is no guarantee that NVM is good.
> 
> sure. Out of curiosity why is the NVM fixup there in the first place ?
It is legacy implementation (many years ago). I believe the 'main idea' 
was to allow SW to fix checksum when somehow it was computed wrongly. 
(probably recover checksum calculation bug in NVM release process)
> 
> Thomas.
> 
Sasha

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