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Message-ID: <20220207172204.589190-2-prasanna.vengateshan@microchip.com>
Date: Mon, 7 Feb 2022 22:51:55 +0530
From: Prasanna Vengateshan <prasanna.vengateshan@...rochip.com>
To: <andrew@...n.ch>, <netdev@...r.kernel.org>, <olteanv@...il.com>,
<robh+dt@...nel.org>
CC: <UNGLinuxDriver@...rochip.com>, <woojung.huh@...rochip.com>,
<hkallweit1@...il.com>, <linux@...linux.org.uk>,
<davem@...emloft.net>, <kuba@...nel.org>,
<linux-kernel@...r.kernel.org>, <vivien.didelot@...il.com>,
<f.fainelli@...il.com>, <devicetree@...r.kernel.org>,
Rob Herring <robh@...nel.org>
Subject: [PATCH v8 net-next 01/10] dt-bindings: net: dsa: dt bindings for microchip lan937x
Documentation in .yaml format and updates to the MAINTAINERS
Also 'make dt_binding_check' is passed.
RGMII internal delay values for the mac is retrieved from
rx-internal-delay-ps & tx-internal-delay-ps as per the feedback from
v3 patch series.
https://lore.kernel.org/netdev/20210802121550.gqgbipqdvp5x76ii@skbuf/
It supports only the delay value of 0ns and 2ns.
Signed-off-by: Prasanna Vengateshan <prasanna.vengateshan@...rochip.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
.../bindings/net/dsa/microchip,lan937x.yaml | 179 ++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 180 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml
diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml
new file mode 100644
index 000000000000..5657a0b89e4e
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml
@@ -0,0 +1,179 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/dsa/microchip,lan937x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LAN937x Ethernet Switch Series Tree Bindings
+
+maintainers:
+ - UNGLinuxDriver@...rochip.com
+
+allOf:
+ - $ref: dsa.yaml#
+
+properties:
+ compatible:
+ enum:
+ - microchip,lan9370
+ - microchip,lan9371
+ - microchip,lan9372
+ - microchip,lan9373
+ - microchip,lan9374
+
+ reg:
+ maxItems: 1
+
+ spi-max-frequency:
+ maximum: 50000000
+
+ reset-gpios:
+ description: Optional gpio specifier for a reset line
+ maxItems: 1
+
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
+
+patternProperties:
+ "^(ethernet-)?ports$":
+ patternProperties:
+ "^(ethernet-)?port@[0-7]+$":
+ allOf:
+ - if:
+ properties:
+ phy-mode:
+ contains:
+ enum:
+ - rgmii
+ - rgmii-rxid
+ - rgmii-txid
+ - rgmii-id
+ then:
+ properties:
+ rx-internal-delay-ps:
+ $ref: "#/$defs/internal-delay-ps"
+ tx-internal-delay-ps:
+ $ref: "#/$defs/internal-delay-ps"
+
+required:
+ - compatible
+ - reg
+
+$defs:
+ internal-delay-ps:
+ description: Delay is in pico seconds
+ enum: [0, 2000]
+ default: 0
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ //Ethernet switch connected via spi to the host
+ ethernet {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ lan9374: switch@0 {
+ compatible = "microchip,lan9374";
+ reg = <0>;
+
+ spi-max-frequency = <44000000>;
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&t1phy0>;
+ };
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&t1phy1>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&t1phy2>;
+ };
+ port@3 {
+ reg = <3>;
+ label = "lan6";
+ phy-mode = "internal";
+ phy-handle = <&t1phy3>;
+ };
+ port@4 {
+ reg = <4>;
+ phy-mode = "rgmii";
+ ethernet = <ðernet>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ port@5 {
+ reg = <5>;
+ label = "lan7";
+ phy-mode = "rgmii";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ port@6 {
+ reg = <6>;
+ label = "lan5";
+ phy-mode = "internal";
+ phy-handle = <&t1phy4>;
+ };
+ port@7 {
+ reg = <7>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&t1phy5>;
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ t1phy0: ethernet-phy@0{
+ reg = <0x0>;
+ };
+ t1phy1: ethernet-phy@1{
+ reg = <0x1>;
+ };
+ t1phy2: ethernet-phy@2{
+ reg = <0x2>;
+ };
+ t1phy3: ethernet-phy@3{
+ reg = <0x3>;
+ };
+ t1phy4: ethernet-phy@6{
+ reg = <0x6>;
+ };
+ t1phy5: ethernet-phy@7{
+ reg = <0x7>;
+ };
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index c7169da15ab4..4449cc2e9c69 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12630,6 +12630,7 @@ M: UNGLinuxDriver@...rochip.com
L: netdev@...r.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
+F: Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml
F: drivers/net/dsa/microchip/*
F: include/linux/platform_data/microchip-ksz.h
F: net/dsa/tag_ksz.c
--
2.30.2
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