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Message-ID: <2762670649daca77a367aaee44b6669142ce0f6d.camel@microchip.com>
Date: Wed, 9 Feb 2022 16:57:27 +0530
From: Prasanna Vengateshan <prasanna.vengateshan@...rochip.com>
To: Andrew Lunn <andrew@...n.ch>
CC: <netdev@...r.kernel.org>, <olteanv@...il.com>,
<robh+dt@...nel.org>, <UNGLinuxDriver@...rochip.com>,
<woojung.huh@...rochip.com>, <hkallweit1@...il.com>,
<linux@...linux.org.uk>, <davem@...emloft.net>, <kuba@...nel.org>,
<linux-kernel@...r.kernel.org>, <vivien.didelot@...il.com>,
<f.fainelli@...il.com>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH v8 net-next 03/10] net: phy: Add support for LAN937x T1
phy driver
On Tue, 2022-02-08 at 14:09 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
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>
> On Mon, Feb 07, 2022 at 10:51:57PM +0530, Prasanna Vengateshan wrote:
> > Added support for Microchip LAN937x T1 phy driver. The sequence of
> > initialization is used commonly for both LAN87xx and LAN937x
> > drivers. The new initialization sequence is an improvement to
> > existing LAN87xx and it is shared with LAN937x.
> >
> > Also relevant comments are added in the existing code and existing
> > soft-reset customized code has been replaced with
> > genphy_soft_reset().
> >
> > access_ereg_clr_poll_timeout() API is introduced for polling phy
> > bank write and this is linked with PHYACC_ATTR_MODE_POLL.
> >
> > Finally introduced function table for LAN937X_T1_PHY_ID along with
> > microchip_t1_phy_driver struct.
>
> Hi Prasanna
>
> That is a lot of changes in one patch.
>
> I would suggest you make this a patch series of its own. It should be
> independent of the switch changes. And then you can break this patch
> up into a number of smaller patches.
>
> Thanks
> Andrew
Sure, i will submit as a seperate patch series and i will remove from this
patch. Thanks.
Prasanna V
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