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Message-ID: <CACRpkdatdECPy29Ef1FPBKR==8ECZKN4iTbVQ_-CzQRbMuVf9A@mail.gmail.com>
Date: Tue, 22 Feb 2022 16:14:39 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Alvin Šipraga <ALSI@...g-olufsen.dk>
Cc: Alvin Šipraga <alvin@...s.dk>,
Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Michael Rasmussen <MIR@...g-olufsen.dk>,
Luiz Angelo Daros de Luca <luizluca@...il.com>,
Arınç ÜNAL <arinc.unal@...nc9.com>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 net-next 2/2] net: dsa: realtek: rtl8365mb: serialize
indirect PHY register access
On Tue, Feb 22, 2022 at 1:19 AM Alvin Šipraga <ALSI@...g-olufsen.dk> wrote:
> > On Mon, Feb 21, 2022 at 7:46 PM Alvin Šipraga <alvin@...s.dk> wrote:
> > What I worry about is whether we need to do a similar patch to
> > rtl8366rb_phy_read() and rtl8366rb_phy_write() in
> > rtl8366rb.c?
>
> Unfortunately I do not have the hardware to test rtl8366rb.c, so I can
> only speculate. But I gave some hints in the commit message which might
> help in checking whether or not it is an issue on that hardware as
> well. The code for rtl8366rb_phy_read() looks similar, but since this is
> a quirk of the hardware design, it could be that it is not
> necessary. The only way is to test.
I can test it.
> If you or somebody else can confirm that it is an issue for RTL8366RB as
> well, I will happily send a patch to the list for testing. You can for
> example try spamming PHY register reads with phytool while also reading
> off switch registers via regmap debugfs. See also the discussion in [1].
>
> [1] https://lore.kernel.org/netdev/878rukib4f.fsf@bang-olufsen.dk/
If you have time to write a patch I'd love testing it!
Yours,
Linus Walleij
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