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Message-ID: <eda7f852-af2b-dac3-bb71-0be7f3230170@gmail.com>
Date: Wed, 9 Mar 2022 09:40:56 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: Clément Léger <clement.leger@...tlin.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
"Andrew F . Davis" <afd@...com>, Dan Murphy <dmurphy@...com>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Miquel Raynal <miquel.raynal@...tlin.com>
Subject: Re: [PATCH] net: phy: DP83822: clear MISR2 register to disable
interrupts
On 3/9/22 6:22 AM, Clément Léger wrote:
> MISR1 was cleared twice but the original author intention was probably
> to clear MISR1 & MISR2 to completely disable interrupts. Fix it to
> clear MISR2.
>
> Fixes: 87461f7a58ab ("net: phy: DP83822 initial driver submission")
> Signed-off-by: Clément Léger <clement.leger@...tlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
--
Florian
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