netdev - Re: [PATCH net-next v3 2/8] dt-bindings: phy: add the "fsl,lynx-28g" compatible

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Message-ID: <Yio8L2X0Wece2Uxm@shell.armlinux.org.uk>
Date:   Thu, 10 Mar 2022 17:58:07 +0000
From:   "Russell King (Oracle)" <linux@...linux.org.uk>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc:     Ioana Ciornei <ioana.ciornei@....com>, davem@...emloft.net,
        kuba@...nel.org, netdev@...r.kernel.org, kishon@...com,
        vkoul@...nel.org, robh+dt@...nel.org, leoyang.li@....com,
        linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        shawnguo@...nel.org, hongxing.zhu@....com
Subject: Re: [PATCH net-next v3 2/8] dt-bindings: phy: add the "fsl,lynx-28g"
 compatible

On Thu, Mar 10, 2022 at 05:47:31PM +0100, Krzysztof Kozlowski wrote:
> > +patternProperties:
> > +  '^phy@[0-9a-f]$':
> > +    type: object
> > +    properties:
> > +      reg:
> > +        description:
> > +          Number of the SerDes lane.
> > +        minimum: 0
> > +        maximum: 7
> > +
> > +      "#phy-cells":
> > +        const: 0
> 
> Why do you need all these children? You just enumerated them, without
> statuses, resources or any properties. This should be rather just index
> of lynx-28g phy.

There is good reason why the Marvell driver does it this way, and that
is because there are shared registers amongst all the comphys on the
SoC.

Where that isn't the case, and there is no other reason, I would suggest
creating multiple phy modes, one per physical PHY in DT, giving their
address would be a saner approach. That way, the driver isn't locked
in to a model of "we have N PHYs which are spaced by such-and-such
apart", and you don't have this "maximum: 7" thing above either.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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