netdev - Re: [PATCH v2 7/8] arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board

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Date:   Tue, 15 Mar 2022 01:24:41 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc:     huziji@...vell.com, ulf.hansson@...aro.org, robh+dt@...nel.org,
        davem@...emloft.net, kuba@...nel.org, linus.walleij@...aro.org,
        catalin.marinas@....com, will@...nel.org,
        gregory.clement@...tlin.com, sebastian.hesselbarth@...il.com,
        adrian.hunter@...el.com, thomas.petazzoni@...tlin.com,
        kostap@...vell.com, robert.marko@...tura.hr,
        linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        linux-gpio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 7/8] arm64: dts: marvell: Add Armada 98DX2530 SoC and
 RD-AC5X board

> diff --git a/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi b/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi
> new file mode 100644
> index 000000000000..ebe464b9ebd2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi
> @@ -0,0 +1,343 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Device Tree For AC5.
> + *
> + * Copyright (C) 2021 Marvell
> + *
> + */
> +
> +/dts-v1/;

> +	memory@0 {
> +		device_type = "memory";
> +		reg = <0x2 0x00000000 0x0 0x40000000>;
> +		// linux,usable-memory = <0x2 0x00000000 0x0 0x80000000>;
> +	};

Is the memory part of the SoC, or is it on the board? Normally it is
on the board, so should be in the .dts file. But Apple M1 etc...

> +&mdio {
> +	phy0: ethernet-phy@0 {
> +		reg = <0 0>;

phy reg values are a single number, the address on the bus, in the
range 0 to 31.

      Andrew