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Message-Id: <20220318201324.1647416-1-michael@walle.cc>
Date: Fri, 18 Mar 2022 21:13:21 +0100
From: Michael Walle <michael@...le.cc>
To: "David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Horatiu Vultur <horatiu.vultur@...rochip.com>,
Michael Walle <michael@...le.cc>
Subject: [PATCH net-next v3 0/3] net: mscc-miim: add integrated PHY reset support
The MDIO driver has support to release the integrated PHYs from reset.
This was implemented for the SparX-5 for now. Now add support for the
LAN966x, too.
changes since v2:
- fix typo in commit message
- use microchip,lan966x instead of mscc,lan966x
- rename mask variable to {phy_,}reset_bits
- check return code from device_get_match_data() right after
the call instead of checking it where it is used
changes since v1:
- fix typo in the subject in patch 3/3
Michael Walle (3):
dt-bindings: net: mscc-miim: add lan966x compatible
net: mdio: mscc-miim: replace magic numbers for the bus reset
net: mdio: mscc-miim: add lan966x internal phy reset support
.../devicetree/bindings/net/mscc-miim.txt | 2 +-
drivers/net/mdio/mdio-mscc-miim.c | 67 ++++++++++++++-----
2 files changed, 50 insertions(+), 19 deletions(-)
--
2.30.2
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