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Message-Id: <20220318070039.108948-1-andy.chiu@sifive.com>
Date:   Fri, 18 Mar 2022 15:00:38 +0800
From:   Andy Chiu <andy.chiu@...ive.com>
To:     radhey.shyam.pandey@...inx.com, robert.hancock@...ian.com,
        michal.simek@...inx.com
Cc:     davem@...emloft.net, kuba@...nel.org, pabeni@...hat.com,
        robh+dt@...nel.org, linux@...linux.org.uk, andrew@...n.ch,
        netdev@...r.kernel.org, devicetree@...r.kernel.org,
        Andy Chiu <andy.chiu@...ive.com>,
        Greentime Hu <greentime.hu@...ive.com>
Subject: [PATCH v3 1/2] dt-bindings: net: xilinx_axienet: add pcs-handle attribute

Document the new pcs-handle attribute to support connecting to an
external PHY in SGMII or 1000Base-X modes through the internal PCS/PMA
PHY.

Signed-off-by: Andy Chiu <andy.chiu@...ive.com>
Reviewed-by: Greentime Hu <greentime.hu@...ive.com>
---
 Documentation/devicetree/bindings/net/xilinx_axienet.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
index b8e4894bc634..a2fa3bef0901 100644
--- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
+++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
@@ -68,6 +68,11 @@ Optional properties:
 		  required through the core's MDIO interface (i.e. always,
 		  unless the PHY is accessed through a different bus).
 
+ - pcs-handle: 	  Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
+		  modes, where "pcs-handle" should be preferably used to point
+		  to the PCS/PMA PHY, and "phy-handle" should point to an
+		  external PHY if exits.
+
 Example:
 	axi_ethernet_eth: ethernet@...00000 {
 		compatible = "xlnx,axi-ethernet-1.00.a";
-- 
2.34.1

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