netdev - RE: [PATCH v4 3/4] dt-bindings: net: xilinx

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Message-ID: <SA1PR02MB856080742C4C5B1AA50FA254C7169@SA1PR02MB8560.namprd02.prod.outlook.com>
Date:   Mon, 21 Mar 2022 15:42:52 +0000
From:   Radhey Shyam Pandey <radheys@...inx.com>
To:     Andy Chiu <andy.chiu@...ive.com>,
        "robert.hancock@...ian.com" <robert.hancock@...ian.com>,
        Michal Simek <michals@...inx.com>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "andrew@...n.ch" <andrew@...n.ch>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Greentime Hu <greentime.hu@...ive.com>,
        Harini Katakam <harinik@...inx.com>
Subject: RE: [PATCH v4 3/4] dt-bindings: net: xilinx_axienet: add pcs-handle
 attribute

> -----Original Message-----
> From: Andy Chiu <andy.chiu@...ive.com>
> Sent: Monday, March 21, 2022 8:55 PM
> To: Radhey Shyam Pandey <radheys@...inx.com>; robert.hancock@...ian.com;
> Michal Simek <michals@...inx.com>
> Cc: davem@...emloft.net; kuba@...nel.org; pabeni@...hat.com;
> robh+dt@...nel.org; linux@...linux.org.uk; andrew@...n.ch;
> netdev@...r.kernel.org; devicetree@...r.kernel.org; Andy Chiu
> <andy.chiu@...ive.com>; Greentime Hu <greentime.hu@...ive.com>
> Subject: [PATCH v4 3/4] dt-bindings: net: xilinx_axienet: add pcs-handle
> attribute
> 
> Document the new pcs-handle attribute to support connecting to an external
> PHY in SGMII or 1000Base-X modes through the internal PCS/PMA PHY.
> 
> Signed-off-by: Andy Chiu <andy.chiu@...ive.com>
> Reviewed-by: Greentime Hu <greentime.hu@...ive.com>
> ---
>  Documentation/devicetree/bindings/net/xilinx_axienet.txt | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> index b8e4894bc634..ba720a2ea5fc 100644
> --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> @@ -26,7 +26,8 @@ Required properties:
>  		  specified, the TX/RX DMA interrupts should be on that node
>  		  instead, and only the Ethernet core interrupt is optionally
>  		  specified here.
> -- phy-handle	: Should point to the external phy device.
> +- phy-handle	: Should point to the external phy device if exists. Pointing
> +		  this to the PCS/PMA PHY is deprecated and should be
> avoided.
>  		  See ethernet.txt file in the same directory.
>  - xlnx,rxmem	: Set to allocated memory buffer for Rx/Tx in the hardware
> 
> @@ -68,6 +69,11 @@ Optional properties:
>  		  required through the core's MDIO interface (i.e. always,
>  		  unless the PHY is accessed through a different bus).
> 
> + - pcs-handle: 	  Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
> +		  modes, where "pcs-handle" should be preferably used to
> point
> +		  to the PCS/PMA PHY, and "phy-handle" should point to an
> +		  external PHY if exists.

I would like to have Rob feedback on this pcs-handle DT property.

The use case is generic i.e. require separate handle to internal SGMII
and external Phy so would prefer this new DT convention is 
standardized or we discuss possible approaches on how to handle
both phys and not add it as vendor specific property in the first 
place.


> +
>  Example:
>  	axi_ethernet_eth: ethernet@...00000 {
>  		compatible = "xlnx,axi-ethernet-1.00.a";
> --
> 2.34.1