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Date:   Fri, 25 Mar 2022 18:22:29 +0100
From:   Clément Léger <>
To:     Andrew Lunn <>,
        Heiner Kallweit <>,
        Russell King <>,
        "David S . Miller" <>,
        Jakub Kicinski <>,
        Paolo Abeni <>
Cc:     Horatiu Vultur <>,
        Thomas Petazzoni <>,
        Alexandre Belloni <>,
        Allan Nielsen <>,,,
        Clément Léger <>
Subject: [net-next 0/5] add fwnode based mdiobus registration

In order to allow the mdiobus to be used completely with fwnode and
continue to add fwnode support. This series adds
fwnode_mdiobus_register() which allows to register a MDIO bus with a
fwnode_handle. This support also works with device-tree and thus allows
to integrate of_mdobus_register on top of fwnode support.

ACPI acpi_mdiobus_register() function seems similar enough with
fwnode_mdiobus_register() to be integrated into that later one and thus
remove ACPI specific registration, keeping only the fwnode one for all
types of node. I'm not able to test that specific part so I did not do
it in this series.

This series is a subset of the one that was first submitted as a larger
series to add swnode support [1]. In this one, it will be focused on
fwnode support only since it seems to have reach a consensus that
adding fwnode to subsystems makes sense.

Additional information:

The device I'm trying to support is a PCIe card that uses a lan9662
SoC. This card is meant to be used an ethernet switch with 2 x RJ45
ports and 2 x 10G SFPs. The lan966x SoCs can be used in two different

 - It can run Linux by itself, on ARM64 cores included in the SoC. This
   use-case of the lan966x is currently being upstreamed, using a
   traditional Device Tree representation of the lan996x HW blocks [1]
   A number of drivers for the different IPs of the SoC have already
   been merged in upstream Linux.

 - It can be used as a PCIe endpoint, connected to a separate platform
   that acts as the PCIe root complex. In this case, all the devices
   that are embedded on this SoC are exposed through PCIe BARs and the
   ARM64 cores of the SoC are not used. Since this is a PCIe card, it
   can be plugged on any platform, of any architecture supporting PCIe.

The goal if this work is to allow OF based drivers to be reused with
software nodes by supporting fwnode in multiple subsystems.



Clément Léger (5):
  net: mdio: fwnode: add fwnode_mdiobus_register()
  net: mdio: of: use fwnode_mdiobus_* functions
  net: mdiobus: fwnode: avoid calling of_* functions with non OF nodes
  net: mdiobus: fwnode: allow phy device registration with non OF nodes
  net: mdio: mscc-miim: use fwnode_mdiobus_register()

 drivers/net/mdio/fwnode_mdio.c    | 214 +++++++++++++++++++++++++++++-
 drivers/net/mdio/mdio-mscc-miim.c |   4 +-
 drivers/net/mdio/of_mdio.c        | 187 +-------------------------
 include/linux/fwnode_mdio.h       |  13 ++
 4 files changed, 229 insertions(+), 189 deletions(-)


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